各大SI EDA软件 - Blogn - 记录个人历史

各大SI EDA软件

作者：hankerer 646字节点击：89697 回复：3258 所属分类：

创建时间：2009-12-22 11:48:13 最后修改时间：2009-12-22 11:48:13

Agilent ADS 2008

Agilent 在1月底发布了ADS的最新版本ADS2008，100%的效率提升，除了之前的2.5D矩量法的EM求解器外，还有全3D有限元的EM求解器，而且3D显示更加*真，为了方便观察PCB的3D结构，还支持Z轴拉升，类似Ansoft Siwave，支持海量数据点的眼图生成、抖动、浴缸曲线分析。其实ADS在SI方面的最大改进在2007年，到ADS2008发布时，已经能够很完善的支持SI仿真分析，尤其是高速串行通道、高速串行收发器的建模上，更是别具一格。而其竞争对手Ansoft的HFSS+Designer+Nexxim的解决方案，一下子就逊色不少，Ansoft需要这三个软件的结合才能实现的功能，ADS2008单独就能做到，而且Agilent凭借在信号测量领域的丰富积累，将其中的测量数据分析功能很轻易就集成到ADS中去，Ansoft只有望其兴叹。

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	来自： hankerer 字节：900 ID：15684 发贴时间：2009-12-22 11:49:25 原贴
	八一八 Agilent与Ansoft之间的恩怨吧。老同志们应该知道Agilent之前也有个HFSS，3D输入采用AutoCAD的环境，而同时Ansoft也有个HFSS，基于Maxwell控制面板来启动，后来Agilent的HFSS卖给了Ansoft，于是Ansoft的HFSS终于一统江湖，业界No.1的3D FEM EM求解软件，同时Agilent在之后的n年内不得涉足3D EM领域。随着这段时间的过去，契约解锁，Agilent迫不及待的推出了EMDS，其实就是之前Agilent HFSS的翻版，改名重新包装而已，Ansoft有苦说不出，然后Agilent又将其EMDS的3D引擎集成到ADS中，ADS只是没有便利的3D输入环境，在3D引擎上与EMDS其实一样，于是ADS就成为集电路、系统、2.5D EM、3D EM与一身的仿真系统。为了方便第三方PCB数据的导入，ADS还带有扩展工具包，类似Ansoft Anslinks，直接插入Cadence Allegro环境，通过增加菜单项就能方便完成区域、网络选取、端口设置等，然后在ADS中输入，进行2.5D EM或3D EM的仿真，得到S参数。ADS还带有功能强大的S模型到Spice模型的转换器，支持6种不同的Spice模型，使用起来很方便。因此，Ansoft的优势，一下子丧失大半。
	来自： hankerer 字节：411 ID：15685 发贴时间：2009-12-22 11:50:17 原贴
	Ansoft Releases Q3D Extractor v8 随着Q3D v8的发布，Q2D终于摆脱传统的Maxwell控制面板，集成到Q3D的桌面系统中，易用性得到大大提高。随着互连速度越来越高，Q3D正在鸡肋化，在SI上的应用正逐渐让位于HFSS，Q3D的尴尬在于准静态的电磁场算法，限制了它不适用于高频场合。用得多的是Q2D，可视化界面，比Hspice里面的文字描述建模来得方便，而且可以适用于任何剖面形状，多导体数也没有限制，Q2D是业界提取均匀传输线模型的事实标准。
	来自： hankerer 字节：1435 ID：15686 发贴时间：2009-12-22 11:51:53 原贴
	Lance Wang与他的IOMeth Lance Wang是原Cadence建模专家，去年离开Cadence创办了上海力恺软件有限公司，从事IO建模、高速分析和PCB设计服务。上海力恺软件有限公司是由美国爱欧公司（IOMeth是Lance Wang 2006年在美国成立的公司）和上海友开科技发展有限公司联合投资的合资企业。 Lance Wang是大陆人，IBIS开放论坛几大官员之一，在高速建模、电路设计和高速分析上具有非常丰富的经验，毕业于上海科技大学，后来去了美国波士顿大学。我与Lance Wang有过一面之缘。上海力恺的主打产品是SignalMeth，一套数字信号处理和信号完整性分析领域的实用工具。它为设计者提供了先进的信号/波形查看，预置/可编程分析报告和独特的信号/波形比较功能，且易于使用。它为信号处理的设计及验证，信号完整性分析的数据后处理，定制测量和报告提供了直观的方法。 SignalMeth提供的功能与Synopsys的2个工具类似，一个是Cosmos Scope，另一个是Spice Explorer。目前看来，SignalMeth没有明显优势，而且支持的格式也没有这两个软件多。另外还有2个波形查看工具，一个是Cadence Sigwave，另一个是Mentor Ezwave，都是各自的仿真工具套件的一部分。 SignalMeth如果能加入专门针对SI的特殊功能，就有特色了，希望edwinzhu能给IOMeth转一下我的两点意见：增加对仿真串行数据流的jitter分析功能，包括x轴、y轴上的jitter分析，增加对多个仿真波形间的Timing自动计算功能。 IOMeth还做了两项公益事业，一个是ibis模型的认证，另一个是开发s2ibis3，从roadmap看，s2ibis3会有gui界面，集成语法检查器，会更加容易使用： http://www.iometh.com.cn/files/Waveform%20Comparison%20and%20S2IBIS3%20Roadmap.pdf 希望IOMeth、力恺的发展越来越好。
	来自： hankerer 字节：2556 ID：15687 发贴时间：2009-12-22 11:57:06 原贴
	关于CST-软波 CST总部在德国，主打产品MWS，是目前Ansoft HFSS的首要竞争对手。MWS基于时域积分法，而HFSS基于频域有限元法，MWS带有瞬态、频域、本征模求解器，在2006B中增加了多层快速多极子算法，目前已经升级到2008。CST的所有工具已经合并成一个套件，包括四个工作室：微波、电磁、粒子、设计，与SI相关是微波工作室和设计工作室，微波工作室是全波3D的电磁场求解器，可以用来提取任何结构的S参数、Spice模型，因为是时域仿真引擎，通过一次激励得到时域的输出，然后直接进行FFT变换，就能得到频域全波模型，没有多个频点的扫描过程，在速度上比HFSS要快，更适合宽带的SI问题求解。微波工作室提供了与第三方PCB工具的接口，目前主流PCB工具都支持，只是没有Ansoft Anslinks的专用接口工具，灵活性要差一些。在Ansoft HFSS 9.0之前，HFSS的界面很简陋，画图不方便，而当时MWS的界面已经是现在的标准开发界面，在这点上，HFSS在向MWS学习。 Ansoft与CST冲突的焦点在2000年，IEEE Trans出版了这样一篇文章： Min Li, Joe Nubel, et al, “EMI from Cavity Modes of Shielding Enclosures- FDTD Modeling and Measurement,” IEEE Trans. Electromagnetic Compat., vol. 42, pp. 29-37, Feb. 2000. 文中有HFSS与MWS的仿真结果对比，文中结论对CST不利，然后此文被Ansoft拿来作为证据摆到潜在客户面前，CST为此在网站专门有个Benchmark的页面来澄清这个问题。链接：http://www.cst.com/Content/Products/Benchmarks/Misleading.aspx HFSS进入国内的时间早，所以用户群多，CST近几年发展不错，对SI的支持越来越好，看看这里就知道了： http://www.cst.com/Content/Applications/Category/Signal+Integrity+and+Power+Integrity 去年，与Simlab（也是一家德国公司）合作，促成CST 2009将增加2个新的模块：PCB工作室和电缆工作室，这两个部件是专门针对SI/PI/EMC分析的。同时，CST收购了Flotherm的EM仿真业务，包括Microstrips和Floemc两个软件，前者是基于TLM的3D EM仿真工具，后者是EMC/EMI仿真工具，这两个工具同样也会整合到CST中去。 CST前些年还有Agilent ADS有过联姻，ADS能动态调用CST的3D模型进行系统仿真，后来随着Agilent EMDS的发布，这个联姻已经成为CST的一厢情愿。可以肯定的说，CST正在大步增强其在SI/PI/EMC的功能，与HFSS+Q3D+Siwave+Designer阵营的差距逐渐缩小。简单说说设计工作室，这个工具类似Ansoft Designer，但远没有后者强大。设计工作室用于进行RF、MW的前端、系统级仿真，可以动态调用MWS的3D模型，仿真引擎是Aplac，Aplac早先是芬兰的进行射频仿真的工具，主要客户是Nokia，后来被AWR收购，设计工作室里面集成的Aplac多少年一直停留，没有更新，以后也不会，除非与AWR合作，所以，设计工作室的功能难有提高，而CST的软肋也在这里，没有自己的系统仿真引擎，与Designer之间的差距是个硬伤。 CST在国内的技术支持力量肯定是要好过Ansoft，因为CST China的老大张敏博士，以前一直在德国进行CST的算法设计，是核心技术人员，如果国内支持解决不了的问题，到了总部德国应该也解决不了。
	来自： hankerer 字节：6376 ID：15688 发贴时间：2009-12-22 12:03:43 原贴
	这是Istvan Novak给出的清单，尽管列出的书不少，但还是有不少好书没在列表中，每个人需要根据自身情况合理选用，如果不是书籍收藏，用不着每本都需要，拥有十本不如精读一本，很多内容都是触类旁通的。 Books on signal and power integrity, EMC Dennis Derickson, Marcus Muller: Digital Communications Test and Measurement. Prentice Hall, January 2008. Madhavan Swaminathan, Ege Engin: Power Integrity Modeling and Design for Semiconductors and Systems. Prentice Hall, December 2007. Mike P. Li: Jitter, Noise, and Signal Integrity at High-speed. Prentice Hall, November 2007. Greg Edlund: Timing Analysis and Simulation for Signal Integrity Engineers. Prentice Hall, November 2007. Istvan Novak, Jason R. Miller: Frequency Domain Characterization of Power Distribution Networks. Artech House, Boston, 2007. Mike P. Li: Design and Test for Multiple Gbps Communication Devices and Systems. Professional Education International, Inc., IEC, 2005. K. Barry A. Williams: Designing Power Distribution Systems for Electronic Circuits. Aikman Engineering LLC, 2005. David M. Pozar: Microwave Engineering. John Wiley & Sons, Inc., 2005. 电子工业出版社中文版，英文版 Dennis Miller: Designing High-Speed Interconnect Circuits. Intel Press, 2004. John R. Barnes: Robust Electronic Design Reference Book, Volume I and II. Kluwer Academic Publishers, 2004. Stephen C. Thierauf: High-Speed Circuit Board Signal Integrity. Artech House, Norwood, MA, 2004. Tom Granberg: Handbook of Digital Techniques for High-Speed Design. Prentice Hall, 2004. F. W. Grover: Inductance Calculations. Dover Phoenix Editions, 2004. Eric Bogatin: Signal Integrity – Simplified. Prentice Hall, New Jersey, 2004. 电子工业出版社中文版，英文版 Howard Johnson, Martin Graham: High-Speed Signal Propagation – Advanced Black Magic. Prentice Hall, New Jersey, 2003. Douglas Brooks: Signal Integrity Issues and Printed Circuit Board Design. Prentice Hall, New Jersey, 2003. 机械工业出版社中文版 Fang Lin Luo, Hong Ye: Advanced DC/DC Converters. CRC Press, London, 2003. Lee W. Ritchey, John Zasio: Right the First Time – A Practical Handbook on High Speed PCB and System Design, Volume One. Speeding Edge, Summer 2003. Chi Kong Tse: Complex Behavior of Switching Power Converters. CRC Press, London, 2003. Daniel G. Swanson, Wolfgang J.R. Hoefer: Microwave Circuit Modeling Using Electromagnetic Field Simulation. Artech House, Norwood, MA, 2003. Richard K. Ulrich, Leonard W. Schaper: Integrated Passive Component Technology. IEEE Press and John Wiley Interscience, 2003. Les Besser, Rowan Gilmore: Practical RF Circuit Design for Modern Wireless Systems, Volume I, Volume II. Artech House, Norwood, MA, 2003. Ron Schmitt: Electromagnetics Explained. Newness Elsevier-Science, 2002. Stephen Hall, Garrett Hall, James McCall: High-Speed Digital System Design, A handbook of Interconnect Theory and Design Practices. John Wiley and Sons, Inc. New York, 2000. 机械工业出版社中文版 Brian Young: Digital Signal Integrity: Modeling and Simulation with Interconnects and Packages. Prentice Hall, Inc., NJ, 2000. Mark I. Montrose: EMC and the Printed Circuit Board – Design, Theory, and Layout Made Simple. IEEE Press, New York, 1999. 人民邮电出版社中文版 Hartmut Grabinski, Petra Nordholz: Signal Propagation on Interconnects. Kluwer Academic Publisher, Boston, 1998. Masakozu Shoji: High Speed Digital Circuits. Addision Wesley, 1997. Don White: The EMC Desk Reference Encyclopedia, EMF-EMI Control, Inc., 1998. Mark I. Montrose: Printed Circuit Design Techniques for EMC Compliance. IEEE Press, 1996. Tocci, Caulfield: Optical Interconnection, Foundations and Applications. Artech House, 1996. Friedman: Clock Distribution Networks in VLSI Circuits and Systems. IEEE Press, 1996. James E. Buchanan: Signal and Power Integrity in Digital Systems: TTL, CMOS, and BiCMOS. McGraw-Hill, 1996. Anatoly Tsaliovich: Cable Shielding for Electromagnetic Compatibility. Van Nostrand Reinhold, 1995. Christos Christopoulos: Principles and Techniques of Electromagnetic Compatibility, CRC Press, 1995 Johnson, Graham: High-Speed Digital Design. A Handbook of Black Magic. Prentice Hall, 1994. 电子工业出版社中文版，英文版 Ashok K. Goel: High-Speed VLSI Interconnections. Wiley Interscience, New York, 1994. Simon Ramo, John R. Whinnery, Theodore Van Duzer: Fields and Waves in Communication Electronics. John Wiley & Sons, Inc., 1994 H. Bakoglu: Circuits, Interconnections, and Packaging for VLSI. Addison Wesley, 1993. Packaging. Intel Corporation, 1993. Clayton R. Paul: Introduction to Electromagnetic Compatibility. John Wiley, 1992. 电子工业出版社中文版第二版，人民邮电出版社中文版第三版 Brian C. Wadell: Transmission Line Design Handbook. Artech House, 1991. S. Kislovski, R. Redl, N. O. Sokal: Dynamic Analysis of Switching-Mode DC/DC Converters. Van Nostrand Reinhold, 1991. Eric Bogatin: High Performance Packaging Solutions. Integrated Circuit Engineering Corporation, 1991. Charles S. Walker: Capacitance, Inductance, and Crosstalk Analysis. Artech House, 1990. E. H. Fooks, R. A. Zakarevicius: Microwave Engineering Using Microstrip Circuits. Prentice Hall, 1990. R. Djordjevic, T.K. Sarkar, R. F. Harrington, B. Bazdar: Time-Domain Response of Multiconductor Transmission Lines; Software and User's Manual. Artech House, 1989. A. R. Djordjevic, T.K. Sarkar, R. F. Harrington, B. Bazdar: Matrix Parameters for Multiconductor Transmission Lines; Software and User's Manual. Artech House, 1989. Fred E. Gardiol: Lossy Transmission Lines. Artech House, 1987. Keiser: Principles of Electromagnetic Compatibility, third edition, Artech House, 1987 Odon Ferenczi: Power Supplies. Akademiai Kiado, Budapest, Hungary, 1987. Takanori Okoshi: Planar Circuits for Microwaves and Lightwaves, Springer-Verlag, Berlin, 1985 H.W. Ott: Noise Reduction Techniques in Electronic Systems, second edition . John Wiley Interscience, NY, 1988. 电子工业出版社中文版 R. E. Matick: Transmission Lines for Digital and Communication Networks. McGraw-Hill Book Company, 1975. H. Howe, Jr.: Stripline Circuit Design. Artech House, 1974. Georges Metzger, Jean-Paul Vabre: Transmission Lines with Pulse Excitation. Academic Press, 1969.
	来自： hankerer 字节：2790 ID：15689 发贴时间：2009-12-22 12:05:15 原贴
	Ansoft Releases Nexxim v4 and Ansoft Designer v4 New technologies enable efficient design of modern high-speed electronics PITTSBURGH - March 6, 2008 - Ansoft Corporation (NASDAQ: ANST) has released new versions of Nexxim? the company's high-capacity circuit simulation software, and Ansoft Designer? its integrated schematic and design management software. The products include new statistical analysis and transient simulation capabilities that allow engineers to rapidly simulate high-speed serial channel behavior. This eliminates prototype iterations that require expensive test equipment and multiple spins that delay time-to-market. Modern electronic products use gigabit-speed serial links to move large quantities of digital data across today's telecommunication, high-definition video, gaming and data storage systems. Ansoft's electromagnetic modeling and advanced circuit simulation are essential for designing these data links. Serial link standards, such as PCI Express, Serial ATA, Gigabit Ethernet and HDMI have very stringent accuracy requirements, allowing only one bit in billions to be in error. Previous methods for simulating link performance required long simulation times to capture these low bit error rates (BERs). The new technologies give engineers methods to rapidly predict system-level performance with eye diagram plots and BER curves. Nexxim v4 features VerifEye? a new methodology for eye analysis of serial links using statistical methods that maintain accuracy while offering major reductions in run time compared to conventional transient methods. These statistical transient analysis tools represent the most practicable means to test for the low bit error rates needed by today's multi-Gb/s channel designers. Nexxim v4 also features QuickEye? a new Ansoft-only fast eye diagram analysis method that allows input of very long, user-defined bit streams. This analysis allows engineers to identify specific bit sequences that cause bit errors. Additionally, Nexxim v4 features new mixed system-level behavioral simulation with transistor-level transient simulation. This hybrid integration enables designers to simulate a complete system consisting of various levels of abstraction much more quickly than in simulators that operate at only the transistor level. Ansoft Designer v4 features a new "push excitation" feature and enhanced dynamic links to Nexxim and to Ansoft's leading electromagnetic field simulation tools HFSS? SIwave?and Q3D Extractor? These products combine to allow engineers to accurately predict signal integrity effects and EMI/EMC performance of advanced electronic systems, including gigabit communication channels, multi-function high-speed wireless systems and sophisticated microwave systems.
	来自： hankerer 字节：679 ID：15690 发贴时间：2009-12-22 12:06:50 原贴
	New in Ansoft Designer v4 "Push excitations" link from Nexxim to HFSS and SIwave. Dynamic link to the 2D Extractor tool. Revised user interface for even better usability. Reusable report templates. Eye diagrams have been significantly enhanced. Reporter functionality is now available through scripting. The user has access to a wide-ranging suite of "ranged functions" for better data reduction. Examples include maximum, minimum, rise time, and overshoot. PlanarEM engine runs in 64-bit mode and supports multiple processors. Distributed Solve Option (DSO) available for parametric sweeps. Frequency-dependent materials are now supported in PlanarEM.
	来自： hankerer 字节：3380 ID：15691 发贴时间：2009-12-22 12:07:06 原贴
	New in Nexxim v4 VerifEye? a new methodology for eye analysis of serial links using statistical methods that maintains accuracy while offering major reductions in run time compared to conventional transient methods. These statistical transient analysis tools represent the most practicable means to test for the low bit-error rates needed by today's multi-Gb/s channel designers. QuickEye? a new Ansoft-only fast eye diagram analysis method that allows input of very long, user-defined bitstreams. This analysis allows engineers to identify specific bit sequences that cause bit errors. Mixed system-level behavioral simulation with transistor-level transient simulation. This hybrid integration enables designers to simulate a complete system consisting of various levels of abstraction much more quickly than in simulators that operate at only the transistor level. C++ model editing wizard Ability to compute the reciprocal response of subcircuits, Nports and Field Solver elements to de-embed the effects of test fixtures. Transient noise analysis Transmission line tool Nexxim's Advantages: Dynamic links to state-of-the-art EM analyses Electromagnetic effects significantly impact circuit behavior at high frequencies of operation. Nexxim's dynamic links to HFSS, SIwave and Q3D Extractor allow the seamless integration of these effects into circuit design. In addition, Nexxim's high simulation capacity handles the additional complexity and circuit size introduced by the electromagnetic effects. Statistical analysis and transient simulation New features VerifEye and QuickEye provide statistical analysis and transient simulation capabilities that allow engineers to rapidly characterize high-speed serial channels. Time-domain simulation using frequency-domain S-parameters Nexxim's inherent advantages in speed and capacity are enhanced with automatic enforcement of passivity and causality to accurately model and simulate physical behavior in the time domain (such as that of complex interconnects in signal integrity applications). Integration with system-level design and user models Nexxim allows the seamless integration of behavioral models and user-defined models (Verilog-A, C++, IBIS) for handling the interaction of analog and digital components within a single simulation. Consistency of results across domains Time-domain (transient) and frequency-domain (harmonic balance, AC) simulations are performed using the same circuit netlist and the same device models across analyses, guaranteeing that results in the different domains are consistent. Higher capacity at increased simulation speed Cutting-edge numerical algorithms and software engineering provide Nexxim with the capacity and speed to handle simulation of high-performance RF devices that have very large transistor/device counts and high harmonic content without sacrificing simulation accuracy. Robust Convergence Nexxim includes robust algorithms across all analysis domains (DC, time, and frequency) that ensure convergence even as circuit size, harmonic content and circuit nonlinearities increase. Model compatibility Nexxim natively supports HSPICE?and Spectre?device models and netlist formats, providing full foundry device model support. Hence, Nexxim seamlessly integrates within and augments existing design flows.
	来自： hankerer 字节：712 ID：15692 发贴时间：2009-12-22 12:07:15 原贴
	呵呵，我话音刚落，Ansoft就马上跟进了，看来还是要适当批评一下，有竞争，才有发展，我们才能用上更先进的软件。可以这么说，Ansoft Designer V4、Nexxim V4主要是针对高速串行通道的仿真而来的，更新的核心在Nexxim V4中，两个关键组件是VerifEye 和 QuickEye，VerifEye是基于统计方法来分析通道响应的，我估计应该类似StatEye，之前Agilent已经在ADS2006A中实现，QuickEye是快速眼图仿真，之前Cadence Allegro、Mentor Hyperlynx中也有类似功能，但都比较初级。Nexxim V4还加强了眼图的后处理能力，能直接给出眼图的基本参数，还有峰峰抖动，和均方根抖动，之前Agilent ADS2006A已经实现这样的功能，而且ADS还能进行抖动的分解，看来Nexxim目前还没有这个功能，是将来努力的方向，与ADS竞争的武器，Nexxim的另一个不足之处是缺乏系统级的通道建模、分析能力。
	来自： hankerer 字节：1624 ID：15693 发贴时间：2009-12-22 12:08:46 原贴
	Ansoft release AnsoftLinks 4.1 What's new in AnsoftLinks 4.1: 1) HFSS v11 and Q3D Extractor v8 export is available. 2) Cadence Allegro/APD v16 and v16.1 support 3) Ability to read in materials from Cadence Allegro/APD 4) Support for Cadence SiP Digital/RF (v16.0 and v16.1) 5) User option to choose whether to subtract metal from dielectrics - this will speed up solid model generation time by decreasing the number of boolean operations - a material override option is available in HFSS v11 and Q3D Extractor v8. 6) Ability to remove plating tails during solid model export 7) Minimum conductor edge length setting 8) Minimum dielectric edge length setting 9) Export to SIwave and Export to TPA is now available 10) Numerous bug fixes and third party translation issues have been addressed In addition, a number of user interface bug fixes are included. ------------------------------------------------------------------------ 6) SUPPORTED LAYOUT TOOL VERSIONS AnsoftLinks 4.1 has been tested with the following versions of the supported third-party layout products: PRODUCT VERSION Cadence Allegro 15.0, 15.1, 15.2, 15.5.x, 15.7, 16.0 and 16.1 Cadence APD 15.0, 15.1, 15.2, 15.5.x, 15.7, 16.0 and 16.1 Cadence SiP Digital/RF 15.7, 16.0 and 16.1 Mentor BoardStation 8.x Mentor Expedition v2004, v2005 Mentor PADS PowerPCB v5.2a, v2005 Synopsys Encore ICPD 2001.x, 2002.x, 2003.x, 2004.x and 2005.x Sigrity UPD 6.x Zuken CR5000 9.x and lower
	来自： hankerer 字节：1948 ID：15694 发贴时间：2009-12-22 12:09:05 原贴
	最近真是忙啊................. Ansoft如期发布HFSS 11.1，没有受到Ansys收购的影响。 Version 11.1 Major Enhancements and Bug Fixes ============================================= Meshing and Geometry Translation: - The mesher will attempt to create an accurate mesh for all geometries, including those which were previously flagged for ACIS-entity errors during design validation. After initial mesh is complete, the profile will indicate when repairs have been made to a model, and the quantity of repairs will be displayed per object under the mesh statistics tab of the solution data panel. - Under Modeler->Validation Settings, users can now set the level to which HFSS checks a model for faults during 3D model validation. - There is an additional option within the Model Resolution mesh operation setup labeled "Auto Simplify Using Effective Thickness". With this option selected the mesher will automatically choose a model resolution value for each object based on its effective thickness. - Nastran (.nas) geometry import is now available. - Parasolid and Unigraphics (Unigraphics import available only on Windows) geometry files can now be imported into HFSS. Post-Processing: - Near-field and far-field computation algorithm has been reworked to improve calculation time. - Fields are now loaded only from the model area that is relevant to the post-processing quantity being calculated, therefore reducing the time needed to generate a field plot. - There is a new option in fast sweep setup labeled "Generate Fields (All Frequencies)". This setting enables HFSS to compute fields for all frequencies during a fast sweep analysis, subsequently storing them to disk. With this option selected, fields will not need to be recalculated when HFSS is post-processing the data.
	来自： hankerer 字节：5024 ID：15695 发贴时间：2009-12-22 12:10:11 原贴
	Agilent即将推出ADS2008的第一个升级版Update1，与SI相关的更新主要有： # Impulse Response Writer # Improved Convolution From S-Parameters 这两个新特性的加入，使得ADS对高速串行通道的仿真支持得更加完善： Impulse Response Writer基于互连物理通道的S参数，进行傅立叶反变换，得到时域的冲激响应波形，并把这个波形文件保存下来，然后对于不同驱动器的仿真，直接用这个波形与驱动器波形时域卷积就得到接收侧的响应波形，基于这种处理，能大大加快高速串行通道的仿真，因为你不需要对通道的响应进行重复计算。 Improved Convolution From S-Parameters是为了使Impulse Response Writer工作得更好的一种改进的卷积算法，S参数是频域参数，需要变换到时域进行仿真，经常会面临无源性、因果性的问题，这个算法就是为了解决这两个问题的。 ------------------------------------------------------------- Agilent ADS 2008 Update 1 ADS 2008 Update 1 brings you the following exciting enhancements: * 10x speedup in planar 3D electromagnetic simulation * 10x speedup in non-linear circuit simulation * Patent pending convolution technology that allows accurate signal integrity simulation with measured S-parameter data of high-speed interconnects * New Simulation Models and Libraries * Further improvement in graphical user interface 10x speedup in planar 3D electromagnetic simulation The 3D planar EM simulator, Momentum, in ADS 2008 update 1 now has at least 10x speed improvement and 6x capacity improvement. This enables you to use electromagnetic simulation as an interactive design tool instead of a sign-off verification tool before hardware prototyping. The high speed of Momentum simulation now allows multiple design explorations to be accomplished easily. An example of a wireless LAN transceiver simulation where the chip area is minimized by 32% by packing the 11 spiral inductors closer together. This translates to a corresponding 32% reduction in the cost of the 802.11/b transceiver RFIC. The simulation took just 2.3 minutes with 650MB of RAM as compared to 38 minutes with 1.2GB of RAM in earlier versions of Momentum. This 15x speed improvement allows for interactive placement of the inductors with their proximity effects analyzed very quickly achieving the overall 32% die size reduction. 10x speedup in non-linear circuit simulation The already powerful harmonic balance simulator in ADS just received additional algorithmic enhancements from Agilent EEsof’s recent acquisition of Xpedion GoldenGate, who has the world’s fastest and highest capacity harmonic balance simulator. Now the harmonic balance simulator in ADS 2008 update 1 can handle bigger circuits and solve them 10x faster. For example, a large RFIC with over 2000 nonlinear elements and over 2000 large signal sources is solved within 250 seconds as compared to 2,485 seconds in the previous versions. The speed and capacity improvements are especially important for fast optimization of large RF-System-In-Package (SIP), MMIC and RFIC to meet higher levels of integration and performance demanded by consumer wireless electronics today. Patent pending convolution technology High-speed multi-gigabit digital serial link designers can now accurately measure the S-parameters of interconnects with vector network analyzers and use it directly in signal integrity simulation of eye diagrams and bit error rate. The patent pending convolution technology in ADS 2008 update 1 guarantees the correct generation of impulse response from measured S-parameters that obeys passivity and causality characteristics of a physical model. This applies even if the measured data is noisy. The proof is in the following comparison of a pulse train sent through an interconnect modeled as a spice netlist and measured S-parameter. Now, we see an exact match. New Simulation Models and Libraries The following new models and libraries are now in ADS2008 update 1: * PSP and HiSIM transistor models for accurate nano-scale (30nm, 45nm) RFIC simulation * Triquint TOM4 latest III-IV FET model optimized for PHEMT technologies to accurately model highly non-linear behavior * Models for gigabit serial link signal integrity analysis: o HSPICE W-elements o IBIS switches o Verilog AMS o De-embedding element for easy removal of test fixture effects o Impulse response model writer * New Ultra Mobile Broadbanc (UMB) wireless library * New updated LTE wireless library * New updated HSDPA wireless library Further improvement in graphical user interface The graphical user interface is further enhanced: * 3D viewer with translucency * Enhanced Data Display with intelligent symbol spacing on dense traces to make multiple traces and printed B/W traces easier to identify. * Enhanced Data Display with Tabs for improved data viewing management * Enhanced Data Display with CSV data export to spreadsheet * Enhanced Layout properties editing on multiple selected objects with Redo function
	来自： hankerer 字节：3515 ID：15696 发贴时间：2009-12-22 12:11:15 原贴
	StaeEye V5 Beta 完全用Python重写，彻底的开放源码，可以在这里下载 http://www.stateye.org/ 目前已经有Agilent ADS、Ansoft Nexxim、Cadence SigXp中支持统计眼图分析。 Specification: Data Input Step input from scope Initially a single step response time record will be requried For more complex transmitter signals the use of a penrose matrix inversion can lead to multiple step responses representing the transmitter, however, I would suggest we leave this for now The support of simple step responses is already supported in the XML definition language of v4.2.2. The support of multiple steps is open. more details of this interface are discussed here S-Parameters all the features from v4 (8×8, mapping, cascading, interpolation, ifft), currently all available in the GUI and XML wizard for SATA, clearly is a new feature, and some .net features have been tried out already by Edotronik investigation of padding requirements and bandwidth requirements for 25Gbps under investigation, needs additional option in XML and GUI Language Support python suport for all necessary machines OS done use of numpy for all necessary math functionality done support of necessary graphical output using matplotlib almost complete Jitter Definition Pulse Width Shrinkage support using time correlated edge jitter shall be initially defined in terms of a simple bimodal peak to peak jitter. Further definition of a time correlated jitter is under discussion with the Technische University München Mid band jitter shall be calculated as in v4. The engine shall accept as an input a histogram description of the jitter distribution. (Higher level functionality in the GUI or scope should be responsable for conversion of RJ/DJ to pdfs. Coding and emphasis All combination are theorically possible, however, each combination needs a new state transition definition therefore a limited number of combinations should be implemented, exact combination to be define. GUI and XML should be changed to cover equalisation using a single object as opposed to a transmitter and receiver object (exact details under discussion, e.g. interpretation of old xml files) 8b10b; discussion still ongoing concerning exact state transition table nrz; no problems duobinary; needs pre-coder, however exact coder/decoder not clear pam4; including pre-coder clear, however, decision level for receiver not clear. No PAM-n. lte; adaption algorithm in v4, as per OIF, was very unsatisfactory, method should be done using convolution of the step response and adaption as below dfe; as per v4. Support for PAM-4 or duobinary currently unclear fir (de-emphasis); as per v4, however, not all combinations with other schemes clear current optimisation using simplex algorithm and eye opening may not be enough, therefore move to more theoritical zeroing of partial or full cursors in step response may be preferable. Would allow faster analysis, and maybe more stable results. Crosstalk ISI should be included using a peak distortion minimisation. all equalisation shall be implemented as analytic solution directly on the pulse/impuse response, i.e. not looping the stateye engine Some additional requests padding for ifft should be function of the fbaud can the time interpolation be removed, as we now have such a large fmax? can fractional fir be supported for DFE/CDR analysis can the edge also be well analysed does FIR @ the Tx = FIR @ the Rx Stateye 仿真得到的通道冲激响应和阶跃响应;
	来自： hankerer 字节：2103 ID：15697 发贴时间：2009-12-22 12:12:28 原贴
	ADS 2008 Update2: EM: Integrated 2D and 3DEM halves module cycle time by effectively doubling design efficiency EM: Improved 3DEM Speed and Capacity EM: Visualization in 3D layout previewer EM: Momentum layout pre-processor simplifies layouts for optimal EM performance EM: Improved Momentum substrate editor EM: ADS link to AMDS for designing adaptive antenna matching to optimize phone performance Circuit Simulation: Batch simulation automates sweeps around multiple sets of measured, simulated, or modeled data Circuit Simulation: Job queuing supports LSF or Sun Grid engine for multiple simulation job management outside of ADS Circuit Simulation: 3X multi-threading Transient-Convolution speedup beats leading SPICE in spead and accuracy New RF PAE (Power-Added Efficiency) test bench and example Circuit Simulation: New Yield Sensitivity Histogram templates exactly pinpoint yield problems in just a few minutes Modeling: Improved IBIS 4.2 support Modeling: New Pole-Zero element for Broadband Spice Modeling: SiMKit updated to v3.1 Modeling: Support for HISIM 2.4.1 Modeling: Enhanced LTE Wireless Library supports downlink MIMO, 2 or 4 antennas, for Space-Time Coding (STC) Modeling: Mobile WiMAX (802.16e) Wireless Library now supports Wave 2 standard ADS Data Display: Fast, enhanced display performance for zoom, pan, redraw ADS Editing and Layout, Data Display: Fast remote display performance ADS Editing and Layout: New enhanced Library Browser with automatic column width and fast search ADS Editing and Layout: New Simulation Variables Dialog for fast viewing and editing of all variables for tuning or optimization ADS Editing and Layout: ODB++ format for precision layout export to manufacturing ADS Editing and Layout: Component level Design Rule Check ensures correct RF module physical design ADS Installation: Fast, enhanced install and uninstall on Windows platforms
	来自： hankerer 字节：425 ID：15698 发贴时间：2009-12-22 12:12:45 原贴
	李老师最近很高产，即将出版3本SI/PI译作，质量如何，让我们拭目以待： B.Young著, 李玉山等译，数字信号完整性：互连、封装的建模与仿真，机械电子工业出版社，2008(原版Prentice, 2001) Mike P. Li著，李玉山等译，高速系统——抖动、噪声与信号完整性，电子工业出版社，2009(年内出版，原版Prentice, 2007) M.Swaminathan, E. Enginet著，李玉山等译, 芯片及系统中的电源完整性建模与设计，电子工业出版社，2009(年内出版，原版Prentice, 2007 )
	来自： hankerer 字节：2104 ID：15699 发贴时间：2009-12-22 12:13:01 原贴
	Synopsys发布Hspice例行更新，B-2008.9，与SI相关的更新主要是支持统计眼图分析，到此为止目前支持统计眼图分析的软件有： Agilent ADS、Ansoft Nexxim、Sisoft QCD，Synopsys Hspice，即将发布的Cadence Allegro也会支持。 Signal Integrity ■ Statistical Eye Diagram Analysis: See the HSPICE User Guide: Simulation and Analysis, Chapter 18, Statistical Eye Analysis. ■ TxLine Utility No license required: The W-element GUI utility, TxLine Tool, can be used for creating transmission line models. TxTool is built into the CosmosScope binary but HSPICE users do not need a CosmosScope license key to run TxTool. You can download the latest CosmosScope binary (or use any CosmosScope binary you have previously downloaded) and run the TxLine tool. See the section “Using the TxLine (Transmission Line) Tool Utility” in Chapter 3 of the HSPICE User Guide: Signal Integrity. Analysis of high-speed serial interfaces requires processing of millions of bits of data making analysis by traditional analysis tools computationally expensive. Eye diagrams are used extensively in the evaluation of high-speed serial interfaces and as a fundamental performance metric for high-speed serial interfaces in the bit error rate (BER). Statistical eye diagram techniques allow eye diagrams and BER to be evaluated quickly and accurately. Examples, Statistical Analysis Setup Incident port definitions p1 tx_in+ tx_in- 0 port=1 p2 in 0 port=2 Probe port definitions p3 rxout+ rxout- 0 port=3 p4 out 0 port=4 Analysis statement .stateye T = 400p trf=20p + incident_Port= 1, 2 + probe_port = 3, 4 + Rj = 5p, 5p, 2p, 2p tran_init = 50 + T_resolution = 300 V_resolution = 300 Print, probe, and measure statements .print stateye eye(4) .print stateye ber(3) .print stateye bathtubV(3, 0.9) .print stateye bathtubT(4, 1n) .probe stateye eye(4) .probe stateye ber(3) .probe stateye bathtubV(3, 0.9) .probe stateye bathtubT(4, 1n) .measure stateye eyevert Veye 4 time=1n tol=0.1n .measure stateye eyehorz Heye 4 volt=0.9 tol=0.05 .measure stateye badbithigh WorstBits 3 time=1n state=high
	来自： hankerer 字节：279 ID：15700 发贴时间：2009-12-22 12:13:17 原贴
	令人期待的Mentor Hyperlynx V8.0，估计会在明年上半年推出，从V7到V8是质的变化，Mentor让我们等待太久：电源完整性仿真，包括S参数模型拟合、转换，FDTD时域仿真、BEM频域仿真、DC Drop仿真快速眼图仿真 CES与LineSim、BoardSim间的接口信号旁路分析、DDR/DDR2/DDR3分析平面噪声、DC压降
	来自： hankerer 字节：1379 ID：15701 发贴时间：2009-12-22 12:14:28 原贴
	最近很忙很忙，今年的ibis summit简短总结就是：没啥新东西，各个厂商独立山头，力推自己的解决方案，没有统一，高速仿真技术的推进速度放缓，多数用户继续观望，高速串行通道的仿真继续痛苦中。另外有个消息就是CST 2009的发布： Key new features in CST STUDIO SUITE 2009  New and enhanced solver technology  True transient 3D EM/circuit co-simulation using LINMIC technology with CST MWS  Transient thermal solver to simulate the heating process  Bio-heat equation for realistic modelling of physiological cooling  Significant performance increase in Integral Equation solver, particularly for structures smaller than 20 wavelengths  True Geometry Adaptation. The mesh adaptation of the tetrahedral frequency domain solver not only refines the mesh, but also snaps to the geometry  High-end simulation  64 bit frontend and MPI based parallelization for the handling of very large and complex structures  User friendly  User interface optimised for productivity  Bend sheet operation for conformal modelling  Improved user/modeller interaction  New products for SI and EMC analysis  CST PCB STUDIO™ and CST CABLE STUDIO™ are fully integrated in CST DESIGN ENVIRONMENT™. Results can be used in CST MWS as field sources for further evaluation.
	来自： hankerer 字节：10688 ID：15702 发贴时间：2009-12-22 12:14:57 原贴
	2008年即将过去，忙碌的一年，多事的一年，期待一下2009吧！ 2009将有2本si book出版，都是进阶版本： Advanced Signal Integrity for High-Speed Digital Designs (Hardcover) by Stephen H. Hall (Author), Howard L. Heck (Author) 这本书的出版日期一再延后，现在应该不会再跳票了吧，最初只有300多页，到现在膨胀到600多页，将近翻倍，这也从另一个侧面说明si发展迅速，以至于book的内容更新还跟不上，新的内容集中在后半部分，主要是关于高速串行互连设计的，而我想看到的也正是这部分。 Editorial Reviews Product Description Signal integrity has become the key issue in most high-performance digital designs. Now, from the foremost experts in the field, this book leverages theory and techniques from non-related fields such as applied physics, communications, and microwave engineering and applies them to the field of high-speed digital design. This approach creates an optimal combination of theory and practice that is meaningful to practicing engineers and graduate students alike. Product Details * Hardcover: 682 pages * Publisher: Wiley-IEEE Press (March 23, 2009) * Language: English * ISBN-10: 0470192356 * ISBN-13: 978-0470192351 Stephen Hall, Intel Corporation Stephen Hall began his career in 1992 in the Special Purpose Processor Division of the Mayo Foundation developing multi-gigabit modeling techniques for X-band digital radar and serial optical links. In 1996, Stephen accepted a job at Intel, where he was lead designer for buses on Pentium? II, III, and IV systems, coordinated research with universities, led research teams in the area of high-speed modeling, and taught Signal Integrity courses. In 2000, Stephen published the textbook "High-Speed Digital System Design" through John Wiley & Sons and is currently co-authoring a new book, "Advanced Signal Integrity for High-Speed Digital Designs," which will be published in the fall of 2008. From 2003 to 2007, Stephen primarily researched new modeling and measurement solutions for channel speeds as high as 30 Gigabits per second and is currently leading PCIe3 channel development at Intel. Howard Heck, Intel Corporation Since joining Intel in 1995, Howard has held R&D engineering and management positions for system electrical technologies (interconnect, power, EMI). He led the development team for the Pentium? II 100 MHz Host Bus, earning an Intel Achievement Award, and managed teams that defined and delivered technology solutions for Direct RDRAM?, DDR II, Pentium? 4 Processor Host Bus, and Accelerated Graphics Port (AGP) interfaces. Prior to joining DEG, he led the Advanced Signaling Technologies team in Intel's Systems Technology Lab, focusing on modeling, simulation, measurement, and technology solution development for 10+ Gb/s signaling. He currently leads the signal integrity effort for Larrabee and Larrabee II. Howard earned the B.S.Ch.E. degree from Northwestern University in 1985, and the M.S.E.E. degree from the National Technological University in 1994. From 1985-1995 he was employed by IBM's printed circuit board manufacturing and high-performance packaging lab, where he led electrical development of their HyperBGA? packaging technology. Since 1997, Howard has also held a position as an Adjunct Professor at the Oregon Graduate Institute, where he teaches High-Speed Digital Interconnect Design. He has presented papers at several industry conferences, holds six patents with four pending, and is a Senior Member of the IEEE. Preface. Acknowledgments. Chapter 1: Introduction: The importance of signal integrity. 1.1 Computing Power: Past and Future. 1.2 The problem. 1.3 The Basics. 1.4 A new realm of bus design. 1.5 Scope. 1.6 Summary. 1.7 References. Chapter 2: Electromagnetic Fundamentals for Signal Integrity. 2.1 Introduction. 2.2 Maxwell’s Equations. 2.3 Common Vector Operators. 2.4 Wave Propagation. 2.5 Electrostatics. 2.6 Magnetostatics. 2.7 Power Flow and the Poynting Vector. 2.8 Reflections of Electromagnetic Waves. 2.9 References. 2.10 Problems. Chapter 3: Ideal Transmission Line Fundamentals. 3.1 Transmission Line Structures. 3.2 Wave propagation on loss free transmission lines. 3.3 Transmission line properties. 3.4 Transmission line parameters for the loss free case. 3.5 Transmission line reflections. 3.6 Time domain Reflectometry. 3.7 References. 3.8 Problems. Chapter 4: Crosstalk. 4.1 Mutual Inductance and Capacitance. 4.2 Coupled Wave Equations. 4.3 Coupled Line Analysis. 4.4 Modal Analysis. 4.5 Crosstalk Minimization. 4.6 Summary. 4.7 References. 4.8 Problems. Chapter 5: Non-ideal conductor models for transmission lines. 5.1 Signals propagating in an unbounded conductive media. 5.2 Classic conductor model for transmission lines. 5.3 Surface Roughness. 5.4 Transmission line parameters with a non-ideal conductor. 5.5 Problems. Chapter 6: Electrical properties of dielectrics. 6.1 Polarization of dielectrics. 6.2 Classification of dielectric materials. 6.3 Frequency dependent dielectric behavior. 6.4 Properties of a physical dielectric model. 6.5 The fiber-weave effect. 6.6 Environmental variation in dielectric behavior. 6.7 Transmission line parameters for lossy dielectrics and realistic conductors. 6.8 References. 6.9 Problems. Chapter 7: Differential signaling. 7.1 Removal of common mode noise. 7.2 Differential Crosstalk. 7.3 Virtual reference plane. 7.4 Propagation of Modal Voltages. 7.5 Common terminology. 7.6 Drawbacks of differential signaling. 7.7 References. 7.8 Problems. Chapter 8: Mathematical Requirements of Physical Channels. 8.1 Frequency domain effects in time domain simulations. 8.2 Requirements for a physical Channel. 8.3 References. 8.4 Problems. Chapter 9: Network Analysis for Digital Engineers. 9.1 High frequency voltage and current waves. 9.2 Network Theory. 9.3 Properties of Physical S-parameters. 9.4 References. 9.5 Problems. Chapter 10: Topics in High-Speed Channel Modeling. 10.1 Creating a physical transmission line mode. 10.2 Non-Ideal Return Paths. 10.3 Vias. 10.4 References. 10.5 Problems. Chapter 11: I/O Circuits and Models. 11.1 Introduction. 11.2 Push-Pull Transmitters. 11.3 CMOS Receivers. 11.4 ESD Protection Circuits. 11.5 On-Chip Termination. 11.6 Bergeron Diagrams. 11.7 Open Drain Transmitters. 11.8 Differential Current Mode Transmitters. 11.9 Low Swing/Differential Receivers. 11.10 IBIS Models. 11.11 Summary. 11.12 References. 11.13 Problems. Chapter 12: Equalization. 12.1 Introduction. 12.2 Continuous Time Linear Equalizers. 12.3 Discrete Linear Equalizers. 12.4 Decision Feedback Equalization. 12.5 Summary. 12.6 References. 12.7 Problems. Chapter 13: Modeling and Budgeting of Timing Jitter and Noise. 13.1 The Eye Diagram. 13.2 Bit Error Rate. 13.3 Jitter Sources and Budgets. 13.4 Noise Sources and Budgets. 13.5 Peak Distortion Analysis Methods. 13.6 Summary. 13.7 References. 13.8 Problems. Chapter 14: System Analysis Using Response Surface Modeling. 14.1 Introduction. 14.2 Case Study: 10 Gb/s differential PCB interface. 14.3 RSM Construction by Least Squares Fitting. 14.4 Measures of Fit. 14.5 Significance Testing. 14.6 Confidence Intervals. 14.7 Sensitivity Analysis and Design Optimization. 14.8 Defect Rate Prediction Using Monte Carlo Simulation. 14.9 Additional RSM Considerations. 14.10 Summary. 14.11 References. 14.12 Problems. Appendix A: Useful formulae, identities, units and constants. Appendix B: 4-port Conversions between T and S-parameters. Appendix C: Critical values of the F-statistic. Appendix D: Critical values of the t-statistic.. Appendix E: Derivation of the internal inductance using the Hilbert Transform. Signal and Power Integrity - Simplified (2nd Edition) (Prentice Hall PTR Signal Integrity Library) (Hardcover) 这本书加入了Eric这几年在PI上的研究成果，估计会有20%左右的新内容，基本上也能猜测到里面的内容，Eric倡导的PI设计方法简单、实用，到时候大家可以收藏一本。 Editorial Reviews Product Description The #1 guide to signal integrity, updated with all-new coverage of power integrity, high-speed serial links, and more. - Up-to-the-minute comprehensive guidance: everything engineers need to know to understand and design for signal integrity - Authored by world-renowned signal integrity trainer, educator, and columnist Eric Bogatin - Focuses on intuitive understanding, practical tools, and engineering discipline - not theoretical derivation or mathematical rigor Summary Today's marketplace demands faster devices and systems that deliver more functionality and longer life in smaller packaging. Signal Integrity - Simplified, Second Edition is the first book to bring together all the up-to-the-minute techniques designers need to overcome all of those challenges. Renowned expert Eric Bogatin thoroughly reviews the root causes of all four families of signal integrity problems, and shows how to design them out early in the design cycle. Drawing on his experience teaching 5,000+ engineers, he illuminates signal integrity, physical design, bandwidth, inductance, and impedance; presents practical tools for solving signal integrity problems; and offers specific design guidelines and solutions. In this edition, Bogatin adds extensive coverage of power integrity and high speed serial links: topics at the forefront of signal integrity design. Three new chapters address: " Designing power delivery networks to support high-speed signal processing " Using 4-Port S-parameters, the emerging standard for describing interconnects in high speed serial links " Working with today's measurement and simulation tools and technologies About the Author Eric Bogatin is President of Bogatin Enterprises, a top provider of signal integrity training and education. His web site, BeTheSignal.com, provides 100+ free publications and 50+ hours of streaming video lectures. Active in signal integrity and interconnect design for 26 years, he has taught 5,000+ engineers through public short courses, in-house short courses at companies such as LSI Logic, Intel, Cisco and IBM, and graduate-level courses as an Adjunct Professor at San Jose State and UC Berkeley Extension. Product Details * Hardcover: 730 pages * Publisher: Prentice Hall PTR; 2 edition (June 8, 2009) * Language: English * ISBN-10: 0132349795 * ISBN-13: 978-0132349796
	来自： hankerer 字节：2169 ID：15703 发贴时间：2009-12-22 12:15:08 原贴
	李老师的第二本译作已经出版，这本书的起点比较高，偏重基础理论，翻译的难度要高于Eric的书，究竟质量如何要等看到书了才知道。目前只有China-Pub上到货了，joyo、dangdang上还没货，估计等几天就有了。 http://www.china-pub.com/44074 数字信号完整性:互连、封装的建模与仿真市场价：￥50.00 普通会员：￥40.00 1-3星会员：￥39.00 4-5星会员：￥37.50(75折) 校园优惠价：￥39.00 基本信息【原书名】 Digital Signal Integrity: Modeling and Simulation With Interconnects and Packages 【原出版社】 Prentice Hall Press 【作　　者】(美)Brian Young [同作者作品] [作译者介绍] 【译　　者】李玉山;蒋冬初[同译者作品] 【丛书名】国际信息工程先进技术译丛.集成电路与半导体技术系列【出版社】机械工业出版社* 【书号】 9787111253150 【出版日期】 2009 年1月【开本】 16开【页码】 363 【版次】1-1 【所属分类】通信 > 通信技术理论与基础内容简介目录作译者封面查看评论(0) 勘误建议【内容简介】本书全面论述了数字系统及传输中的信号完整性问题；以数字系统为背景，在引入信令属性和互连模型的概念之后，介绍了反射、串扰、同时开关噪声等典型问题，以及互连线的多端口模型；以建模为主线，深入探讨了：电感、电容、电阻等无源元件模型，多引脚寄生参数的测量技术，互连的集总模型和宽带模型等。在提高篇讨论了端接、电源分布和先进封装等高级应用范例。. 本书对于从事数字信号完整性及电磁兼容技术的研究或设计开发人员来说，是一本难得又实用的工程参考书。... 【作译者介绍】本书提供作译者介绍 Brian Young(杨·布赖恩)是摩托罗拉半导体部Somerset设计中心的技术部成员，从事PowerPCTM微处理器和RapidIOTM互连架构的封装互连以及I／O方面的设计。在七年多的时间里，他针对微处理器，快速静态RAM与DSP等，潜心研究高速信令的仿真、建模、测量及性能。他曾在得克萨斯 A&M大学(College Station)电气工程系任助教；在得克萨斯大学奥斯汀分校电气工程系任副教授。Dr．Young毕业于得克萨斯大学奥斯汀分校并获得博士学位；拥有六个与封装相关的专利；在国际会议和学术期刊上发表了大量论文。.... << 查看详细【目录信息】序言. 译者序前言第1章数字系统与信令 1．1 提高性能时的折衷 1．2 信令标准和逻辑系列 1．3 互连 1．4 数字系统建模第2章信号完整性 2．1 传输线 2．2 理想点到点信令 2．3 非理想信令 2．4 不连续引起的突变 2．5 串扰 2．6 拓扑结构 2．7 同时开关噪声 2．8 系统时序 2．9 习题
	来自： hankerer 字节：2169 ID：15704 发贴时间：2009-12-22 12:15:22 原贴
	李老师的第二本译作已经出版，这本书的起点比较高，偏重基础理论，翻译的难度要高于Eric的书，究竟质量如何要等看到书了才知道。目前只有China-Pub上到货了，joyo、dangdang上还没货，估计等几天就有了。 http://www.china-pub.com/44074 数字信号完整性:互连、封装的建模与仿真市场价：￥50.00 普通会员：￥40.00 1-3星会员：￥39.00 4-5星会员：￥37.50(75折) 校园优惠价：￥39.00 基本信息【原书名】 Digital Signal Integrity: Modeling and Simulation With Interconnects and Packages 【原出版社】 Prentice Hall Press 【作　　者】(美)Brian Young [同作者作品] [作译者介绍] 【译　　者】李玉山;蒋冬初[同译者作品] 【丛书名】国际信息工程先进技术译丛.集成电路与半导体技术系列【出版社】机械工业出版社* 【书号】 9787111253150 【出版日期】 2009 年1月【开本】 16开【页码】 363 【版次】1-1 【所属分类】通信 > 通信技术理论与基础内容简介目录作译者封面查看评论(0) 勘误建议【内容简介】本书全面论述了数字系统及传输中的信号完整性问题；以数字系统为背景，在引入信令属性和互连模型的概念之后，介绍了反射、串扰、同时开关噪声等典型问题，以及互连线的多端口模型；以建模为主线，深入探讨了：电感、电容、电阻等无源元件模型，多引脚寄生参数的测量技术，互连的集总模型和宽带模型等。在提高篇讨论了端接、电源分布和先进封装等高级应用范例。. 本书对于从事数字信号完整性及电磁兼容技术的研究或设计开发人员来说，是一本难得又实用的工程参考书。... 【作译者介绍】本书提供作译者介绍 Brian Young(杨·布赖恩)是摩托罗拉半导体部Somerset设计中心的技术部成员，从事PowerPCTM微处理器和RapidIOTM互连架构的封装互连以及I／O方面的设计。在七年多的时间里，他针对微处理器，快速静态RAM与DSP等，潜心研究高速信令的仿真、建模、测量及性能。他曾在得克萨斯 A&M大学(College Station)电气工程系任助教；在得克萨斯大学奥斯汀分校电气工程系任副教授。Dr．Young毕业于得克萨斯大学奥斯汀分校并获得博士学位；拥有六个与封装相关的专利；在国际会议和学术期刊上发表了大量论文。.... << 查看详细【目录信息】序言. 译者序前言第1章数字系统与信令 1．1 提高性能时的折衷 1．2 信令标准和逻辑系列 1．3 互连 1．4 数字系统建模第2章信号完整性 2．1 传输线 2．2 理想点到点信令 2．3 非理想信令 2．4 不连续引起的突变 2．5 串扰 2．6 拓扑结构 2．7 同时开关噪声 2．8 系统时序 2．9 习题
	来自： 222.190.117.* 字节：1530 ID：15705 发贴时间：2009-12-22 13:13:45 原贴
	ADS 2009将在本月中旬正式发布，又是一次SI仿真功能的大提升： Signal Integrity * Channel Simulator * New, fast eye diagram measurements * Djordjevic loss model for fast, causal multilayer models * Causality-corrected microstrip and stripline models * Threaded impulse characterization for faster convolution Simulation * GPU enabled Transient simulator * Multi-threaded harmonic balance * Arbitrary Jitter Analysis with FrontPanel * Support HSPICE .pat statement * Improved Passive Circuit Design Guide * Wireless Libraries (WiMedia v1.2, 3GPP/ LTE MIMO v8.3.0 & v8.4.0) * Pole-zero voltage and current controlled sources Physical Layout * DRC for Flattened Layout * DRC 3rd-party integration (Calibre, Assura, MailDRC) * PDK Builder for Schematic Momentum G2 * Improved meshing and resistance modeling * Port resequence utility * Substrate stack driven viewing utilities * New pre-/post-simulation 3D viewer (RFDE) * Graphical substrate editor import/export (RFDE) * Enhancements to BroadBand Spice Model Generator * Enhanced data transfer from Allegro EMDS G2 * 3D parameterized components * Fast frequency sweep for iterative solver * Symmetry planes Usability * AEL Debugger * Data Display snap-to-grid for plot alignment * Per-job control on feature-bit bundle licenses * Improved ADS examples * New statistics and DOE tab for Variable Setup dialog
	来自： 222.190.117.* 字节：1571 ID：15706 发贴时间：2009-12-22 13:14:35 原贴
	风雨飘摇中的SUN SUN已经陷入亏损、股票缩水和增长停滞的灰色旋涡。在网络和电信大发展和泡沫破灭的整个过程中，SUN可谓受益和受害最多，高科技公司中几乎无出其右者。在过去的几年中，SUN的股票缩水75%，是IBM的二倍还多，尽管从2002年的数据看来，Sun仍然是 UNIX的领军人物，但相对于竞争对手，SUN的景况更让人担忧：作为SUN安身立命的根本--服务器，不仅在低端面临DELL的残酷进攻，而且高端又被 IBM抢占了风头，而高低通吃的惠普，则更让SUN坐卧立不宁。至于Wintel联盟，根本一直就是SUN的心腹大患。　　而最要命的是，SUN在办公软件、Linux终端等方面频频拓展，从CPU到操作系统到存储到工作站等等，SUN 四面出击，不仅胜算多少还很难说，这无异四面树敌。SUN面对18年以来最严重的销售衰退。 10年前，SUN的PI设计是业界做得最好的，到现在已经物是人非，昔日做PI的人相继流失：首先是Larry Smith去了Altera，然后是Raymond Anderson去了Xilinx，现在Istvan Novak也要开始单干： Welcome to the Electrical Integrity webpage. These webpages are maintained as a service to the professional signal and power integrity engineering community. Feel free to browse these pages; all links on the left, except the last one, are accessible without any restriction or registration. The content is split between signal and power integrity, as also illustrated by the logos to the left and right of the title. The two logos are fancy-looking colorful graphs, but they are actually relevant to signal and power integrity. If you are curious about the technical meaning of the logos, click on them to view brief explanations. http://www.electrical-integrity.com/Istvan%20Novak%27s%20Electrical%20Integrity%20Home%20Page.html
	来自： 222.190.117.* 字节：569 ID：15707 发贴时间：2009-12-22 13:15:22 原贴
	Mentor终于发布Hyperlynx SI/PI 8.0: Mentor Graphics released 200903075 HyperLynx SI/PI HLSI/PI8.0 on Apr 10, 2009. Advanced SERDES CoSim Op SW New HyperLynx PI DC Drop Ap SW New HyperLynx PI Decoupling Ap SW New HyperLynx PI Power Bnd SW New HyperLynx SI BSim EXT Ap SW New HyperLynx SI BSim GHz Ap SW New HyperLynx SI DDRx Ap SW New HyperLynx SI EXT Bnd SW New HyperLynx SI GHz Bnd SW New HyperLynx SI LSim EXT Ap SW New HyperLynx SI LSim GHz Ap SW New HyperLynx SI PI Bnd SW New S Parameter Extraction Op SW New
	来自： 222.190.117.* 字节：2261 ID：15708 发贴时间：2009-12-22 13:15:37 原贴
	甲骨文收购Sun 今年夏天完成交易甲骨文以现金收购Sun微系统公司,交易价格达74亿美元。该协议达成后，IBM公司放弃了收购网络设备制造商。IBM公司此前表示愿意以每股9.40美元购买Sun公司的股票，但收购谈判破裂后，IBM公司于本月初取消独家谈判权，IBM并撤回其报价。甲骨文Oracle预期购买在交易关闭之后的第一年每股增加至少15 美分的所得。该交易已被Sun公司的董事会通过，甲骨文公司预计将在今年夏天完成此次的交易。 http://www.sun.com/aboutsun/media/presskits/2009-0420/index.jsp Sun的硬件部门将何去何从？Istvan Novak也在Silist上正式公布了自己的网站，一个好消息是这次的网站没有撞墙，而上att的网站是需要翻墙的。 Date: Mon, 20 Apr 2009 09:00:50 -0400 From: Istvan Novak <istvan.novak@att.net> Subject: [SI-LIST] Electrical Integrity website is up and running Dear list members, As you may recall from an earlier posting from last Fall, for the tenth anniversary of creating the http://home.att.net/~istvan.novak/ website, it moved to a new place. Thanks for all of those list members who came forward with suggestions and feedback. The http://www.electrical-integrity.com/ website is now up and running with a lot of added contents. More than a dozen items were added to the Paper download page, both new, and some very old, based on the frequency of off-line requests to those items. The Tool download section has two new illustration pieces, both may be relevant to recent discussions on the frequency variations of dielectric loss and characteristic impedance. The Links page has also been updated and expanded with new items. The new Book reviews page will soon be the home of my personal views on books in signal and power integrity. The first in the making is on Resso-Bogatin: Signal Integrity Characterization Techniques. The next in line may be Hall-Heck: Advanced Signal Integrity for High-Speed Digital Designs All of the above pages are free and require no registration. The last page, Class participants, is reserved for the participants of my signal integrity and power integrity classes. For a list of scheduled classes please look at the websites of the organizers, listed with links on the bottom of the opening page. As always, if you have feedback or questions, feel free to send a mail. Regards, Istvan
	来自： 222.190.117.* 字节：2170 ID：15709 发贴时间：2009-12-22 13:15:52 原贴
	力恺发布SIMDE，我一直在等待S2ibis的升级，看来现在是没戏了，因为维护、升级S2ibis一定是免费的，而SIMDE则可以卖钱！ SIMDETM V1.0 简介仿真在高速系统设计中起着越来越大的作用。它可以帮助您优化设计性能，缩短设计周期，降低样机成本和投入到市场的周期。电气（电子）建模是进行芯片和系统仿真的起点。信号完整性模型开发环境（SIMDE™）提供了图形化模型开发和验证环境，为模型开发和验证提供直观的方法。它着重于SI模型自动生成和验证过程（本版本中的IBIS和SPICE宏模型，以后升级版本中的Verilog-A / VHDL-AMS）。 SIMDE ™帮助您提高建模性能和精度。 IBIS模型生成与验证 SIMDE™提供了一个自动化的IBIS缓冲器模型生成和验证过程。它提供了一个图形界面，对应SPICE缓冲器节点以及使用原理图编辑模式设置其它节点。在整个过程中不需要任何手工编辑。它会自动运行Synopsis HSpice，从Spice缓冲器中提取缓冲行为。 SIMDE™ 有生成IBIS缓冲器模型的无缝验证流程。在生成IBIS缓冲器并利用IBIS缓冲器在您自己的拓扑结构上进行IBIS模型验证时，SIMDE™会自动记忆Spice模型的设置。它还提供了Spice、IBIS仿真的波形查看的详细DPI（差异峰值指数）和DAI（差异平均指数）。它包括： ►自动对应Spice缓冲器节点的功能； ►图形界面节点设置功能； ►从Spice中自动提取IBIS缓冲器； ►驱动和接受模式下的补偿电容提取功能； ►提供所有IBIS输入/输出/双向模型类型和差分缓冲器（伪差分对、半差分对和全差分对缓冲器）的提取功能； ►IBIS缓冲模型验证区域，可自由设置拓扑； ►详细的验证报告，包含DPI（差异峰值指数）和DAI（差异平均指数）； ►波形查看IBIS缓冲曲线和ODT、非单调性和负载线验证报告（SignalMeth™ IBIS 应用模块） Spice宏模型生成、拟合和验证 SIMDE™提供了Spice宏模型生成、拟合和验证的综合流程。它允许用户从零开始或从基本元件开始，使用我们集成的标准库元件或您自己设计的黑盒元件。拟合流程中可以加载标准波形（Golden waveform）以便进行宏模型的优化。它可以扫描多个参数并找出最符合标准波形（Golden waveform）的参数。验证流程提供了一个简易验证宏模型的环境，宏模型可以是您自己创建的，也可以加载其它模型来进行特定的验证。它几乎可以创建任何您需要的模型。我们提供以下特定模型的教程： • 预加重驱动器 • SSO 驱动器 • SSO 驱动器 (IBIS BIRD 95 type) • SSO 驱动器(IBIS BIRD 98 type) • SSO 接收器
	来自： 222.190.117.* 字节：4741 ID：15710 发贴时间：2009-12-22 13:16:08 原贴
	Introducing IE3D-SI · IE3D-SI targets circuit designers and signal integrity engineering teams developing advanced packages, PCBs, ICs, and MMICs. · The entire “layout-to-EM model” flow is fully automatic featuring 1-Click native integration from Cadence Allegro® PCB/ Package Designer, AWR Microwave Office®, Autocad DXF and GDSII layout databases. · Automatic 3D geometry model creation features full support for TRUE dimension for , bond wires, solder balls & bumps, interconnect and dielectric thicknesses. Proprietary non-uniform mesh generation and adaptive Intelli-Fit curve fitting ensure fast and accurate simulation results for these broadband applications. · Built-in mixed domain SPICE simulation performs robust, accurate, and efficient time-domain simulation based up frequency domain s-parameter models. Great for simulation of transient and time-harmonic analysis of interconnect-like passive structures. Includes broadband SPICE model extraction, stimulus and signal spectrum analysis, transmission line delay analysis, and random/jitter-enabled clock signal analysis with eye-diagram display. Full Package, PCB and Circuit Solution Today’s high-frequency IC, MMIC, package and PCB designs need full-wave EM-accurate circuit models to confidently converge on a final physical implementation that will satisfy your target performance requirements. IE3D-SI is the industry’s first full-wave 3D EM design and verification solution proven to meet the capacity & run-time performance demands of complete package, PCB or circuit-level simulation and modeling. The results are EM-accurate enabling design and SI engineers to design and verify even their largest designs with the highest level of confidence. High Capacity Using other commercial EM tools forces engineers to over-simplify and/or reduce the size of the structure to be simulated. In many cases, layer stack-ups, and adjacent metal structures must be trimmed away before the tool can attempt to complete the simulation. As a result, the engineer gives up too much accuracy with these approaches and proves to be too limiting, very time-consuming, and totally inadequate towards capturing all the important parasitic coupling and electrical characteristics of the complete structure. Unfortunately, the designer is left with a poor choice to widen design margins which leads to under achieving system performance goals and requiring more area or I/Os than necessary. Automatic 3D Geometry Modeling & Meshing One of the biggest challenges accompanying very large EM structure simulation, is the ability for the user to quickly and accurately build a full 3D geometry model. Secondly, generating an EM mesh for such a structure that fits into a compact computer memory footprint and will not overwhelm the underlying EM engine has long been a unbroken design barrier. IE3D-SI is the first industrial solution that has successfully shattered this design barrier with native integration to a variety of popular layout design tools. Full 3D geometry models of bond wires, solder balls, bumps, vias, interconnect and dielectric layers are automatically extracted directly from the layout data and meshed to ensure proper handling by the IE3D-SI EM engine. Now, design and signal integrity engineers are granted easy access to an accurate EM solution to improve and verify a design’s final performance as part of their overall EM design practice. EM Modeling & Mixed-Domain Spice Simulation IE3D-SI delivers multiport s-parameter models (Touchstone Format) and broadband RCLK Spice sub circuit models ready to be plugged into your circuit simulations. IE3D-SI also comes equipped with MDSPICE, a mixed frequency and time domain SPICE simulator featuring a combined time-domain and frequency-domain simulation engine. MDSPICE performs robust, accurate, and efficient time-domain simulations based upon frequency-domain s-parameters. MDSPICE accepts any combination of s-, y- or z-parameter files as elements or RLC sub circuit netlists. It is well known that s-parameter frequency responses are an accurate and complete description of circuit performance. It is well known extracting RLC netlists from s-parameter models is an optimization process that suffers accuracy loss over broad frequency range. Such extraction methods attempt to match frequency responses of the extracted RLC netlist to that of the target s-parameter file. Structures with many ports further limit this approach. MDSPICE does not have such frequency limitations and performs efficient transient analysis of complex multiport EM structures without loss of accuracy.
	来自： 222.190.117.* 字节：1494 ID：15711 发贴时间：2009-12-22 13:16:44 原贴
	2009年CST100%兼并Simlab公司 2009年4月16日，在德国达姆斯塔特市CST总部，计算机仿真技术股份有限公司（简称CST）正式宣布SimLab软件有限责任公司已成为CST 股份有限公司全资子公司。继2007年6月两公司成功签署参股合股协议之后，CST收购了Simlab全部已发行股票。专注于PCB（印刷电路板）和电缆束仿真的设计工程师们将得益于这次收购后双方产品开发与支持的全面协同开拓。这次收购将促进SimLab的刀片技术与CST设计环境的融合。基于SimLab技术的两大产品早已成功整合在CST STUDIO SUITE™（CST工作室套装），即CST PCB STUDIO™ (CST PCBS) 和 CST CABLE STUDIO™ (CST CS)，研究PCB板上的信号传播和高效能电缆束。 CST PCB STUDIO CST PCBS用于研究信号和电源的完整性，电路印刷板(PCB)上的EMI电磁干扰影响和EMC电磁兼容仿真，以及涉及高速数字、模拟或混合信号的应用和电源应用。CST PCBS将不同的设计流程整合在一起，计算寄生串音影响和仿真频域或者时域内的电子网络。最值得称道的是它与CST微波工作室的接口可以把PCB仿真与电磁辐射连续完整的3D分析结合起来。 CST CABLE STUDIO CST CS用于分析电缆束系统的SI(信号完整性)，EMC(电磁兼容)和EMI(电磁干扰)影响，包括当电缆数量不受限制极其繁杂时，CST CS用于优化单线，双绞线和混合电缆束的屏蔽，重量和占用空间；当然也包括传统运用的分析，如针尖电压分布，穿过元器件的电流，散射参数，阻抗和通过CST MWS 的辐射仿真。 CST管理总监贝纳德.瓦格纳博士评价此次收购：这次收购标志着EMC/信号完整性分析工具不断增长的市场需求。SimLab在EMC领域大量的技术秘诀已证明是无价的，它加强了CST在3D EM仿真市场的专业水准。我们的客户也将得益于这些市场上独一无二技术的完美组合。
	来自： 222.190.117.* 字节：6088 ID：15712 发贴时间：2009-12-22 13:17:08 原贴
	Ansoft发布HFSS 11.2,首次提供与Ansys V12的接口进行机械分析和热分析： Version 11.2 Enhancements ============================================= HFSS is now able to export surface and volume losses in .xml file format for linking to an ANSYS Mechanical v12 thermal analysis. DXF files can now be imported with .tech layer mapping files. 同时更新的还有Designer 4.1，Nexxim 4.1： MAJOR ENHANCEMENTS Designer V4.1 -------------------------------- - General: o New S Parameter Analyzer tool - reorder matrix - renormalize matrix - adjust termination impedance - de-embed ports (if gamma is defined) - check passivity - look at statistics of data - color coded data tables and XY plots - color coded matrix display in multiple formats - compare two S matrices o New I/O Wizard to setup channels and IBIS buffers - rapid setup of IBIS drivers for large pin counts - ability to group individual items into sub-circuits - support parameterization of all component parameters (sources, power) - produces a fully functional final schematic o New option to only look at presolved data while tuning o New event callbacks that run before, during or after simulation o Bypass option for solver-on-demand models o Improved tuning speed by prevent engine reloading o Speed improvements in parameteric model data reading and writing o User can define different locations for syslib and userlib o Nexxim - DSO support for parametric sweeps - Dynamic links to Ansoft products: o Push excitations for QuickEye MAJOR ENHANCEMENTS Nexxim V4.1 -------------------------------- - General: o Support for remote analysis o User control of "errpreset" and "relref" in transient analysis o Support for slotline and suspended stripline substrates - Eye analysis: o Support for crosstalk analysis - bit pattern setup per source - UI, delay, per source. - control over num UI per step response o Receiver jitter analysis - post processing bathtub curves with PDF's o Receiver noise analysis o Peak distortion analysis (worst case bit patterns) o Support for 8b10b encoding - New components: o Coplanar Waveguide - Air Bridge - Air Bridge, Cross Over - Bend, Ground Plane Distance - Tapered line, Exponential - Tapered Line, Linear o Grounded Coplanar Waveguide - Air Bridge - Air Bridge, Cross Over - Bend, Ground Plane Distance - Tapered Line, Exponential - Tapered Line, Linear o Microstrip - Air Bridge - Optimally Mitered Bend - Arbitrary Mitered Bend - Bond Pad - Differential Lines, Field Solver (1, 2, 3, 4, and 5 pairs) - Transmission Line, Field Solver o Stripline - Optimally Mitered Bend - Differential Lines, Field Solver (1, 2, 3, 4, and 5 pairs) - Transmission Line, Field Solver o Suspended Stripline - Transmission Line, Physical Length - Transmission Line, Electrical Length o Slotline - Multicoupled Lines (2, 3, and 4) o Filters - Bessel-Thompson Bandpass - Bessel-Thompson Bandreject - Bessel-Thompson Highpass - Bessel-Thompson Lowpass - Elliptic Bandpass - Elliptic Bandreject - Elliptic Highpass - Elliptic Lowpass - Pole-Zero Bandpass - Pole-Zero Bandreject - Pole-Zero Highpass - Pole-Zero Lowpass - Polynomial Bandpass - Polynomial Bandreject - Polynomial Highpass - Polynomial Lowpass - S-Domain Transfer Function, Pole-Zero - S-Domain Transfer Function, Polynomial o Ideal Microwave - Antenna, Dipole - Antenna, Monopole - Microwave Link o Lumped General - Air Bridge, Rectangular Cross Section - Admittance Inverter - Impedance Inverter Siwave 4.0即将发布： SIwave v4.0 Enhancements: Updated user interface - Improved layer stackup: ability to view vias on a layer by layer basis - Dynamic Zoom capability - Net Color mode - Editable Properties window - Find component based on Part Name or Reference Designator - Updated Reporter Import/Export - BoardStation XE/RE import capability - Expedition v2007.x import capability - Layer stackup import and export - Apache CPM import - Component mapping file import (defines a partname as a specific type of component) Project setup - Package on PCB utility built into SIwave GUI - Ability to modify trace cross sections (trapezoidal or hexagonal) - Updated validation check - Improved scripting capabilities - Sketched and Low bondwire models are available - User can define an IC Die Network Meshing - New mesh generation approach (geomproc instead of bsm_mesh). New tolerance meshing - Improved adaptive mesh refinment for DC solver using energy error indicators - Adaptive near field observation mesh Solver - Multilayer MoM2D solver (improved trace models) - Multithreaded trace extraction - Trace bend modeling - Coplane and split plane coupling and the ability to view coupled segments after the simulation completes - New via model for improved accuracy - 64-bit eigen solver - DC IR drop solver improvements Resistance probe Port solve and Spice Net List solve using the DC solver Be able to view convergence analysis like in HFSS and Q3D Extractor - Far field and near field calculation updates - SIwizard for Designer/Nexxim link - Ability to run multiple solutions and access the results - New thin metal plane handling (solver will treat them as traces). 随着siwave 4.0的发布，maxwell控制面板将彻底消失。
	来自： 222.190.117.* 字节：697 ID：15713 发贴时间：2009-12-22 13:17:24 原贴
	一个令人震惊的消息，Agilent EEsof面临调整，这金融危机搞得，ADS将何去何从？ Agilent's EEsof EDA Division, who claims to be the #5 EDA Vendor, no longer exists, at least not as a separate division within Agilent Technologies. There were massive layoffs at the Westlake Village, CA R&D center (former EEsof facility) as well as layoffs in Santa Rosa and elimination of many PDK development jobs in India. In total there were approx 67 layoffs, out of roughly 200 people in the former "division". Job cuts included all technical support, marketing, consulting services, and business admin in Westlake Village. What's left of EEsof has been collapsed into the Component Test Group.
	来自： 222.190.117.* 字节：5138 ID：15714 发贴时间：2009-12-22 13:18:14 原贴
	终于有了ADS 2009 Update1的消息，看来应该会继续，好事情。当形式不好的时候，大家的日子都不好过，都在一个产业链上。 Update1主要的增强在X参数，3D EM上，其中3D EM可能是与EMPro 2009提供集成接口。EMDS已经好久没有更新，我估计可能要调整，现在已经证实，EMPro 2009=AMDS+EMDS，包含FDTD，FEM两个全波电磁场引擎。 Advanced Design System (ADS) 2009 Update 1 includes: * New X-parameter Model Generator — creates fast, IP-protected nonlinear models * Enhanced Integrated 3D EM Analysis — including Finite Element EM sweeps, optimization and co-simulation with circuit analysis * Complete Flow to Manufacturing — including enhanced PDKs, interactive desktop design checker and Calibre LVS integration * New Optimization Cockpit — interactively monitor, tune and guide optimizations for better results, faster * Dozens of other improvements to the circuit & EM simulators, models & libraries, and the ADS Core platform including layout & data display ADS 2009 Update 1 delivers new features and improved value for all ADS users with special focus on MMIC and RF Module design, including enhancing the complete flow to manufacturing. These new features eliminate the time to integrate disparate point tools from numerous vendors (e.g. 3D EM and Layout). This, along with the new simplified ADS product structure, can provide significant license cost savings for the MMIC/Module design. Learn more about the new ADS product structure. New X-parameter Model Generator X-parameter* models are fast, cascadable, nonlinear behavioral models that accurately account for frequency mixing and impedance mismatch. X-parameters fulfill a long standing need from the high-frequency design community for nonlinear behavioral models that can be created from measurement or simulation with the same speed and convenience as the well known linear S-parameters. The X-parameter Model Generator enables MMIC, RF-SIP and RF module design houses to provide their customers with an accurate, pre-prototype model of their nonlinear devices (e.g. power amplifiers, front-end modules and transceivers) to further enable concurrent design and secure early design wins. Learn more about X-parameters. Enhanced Integrated 3D EM Analysis 3D parameterized components from Electromagnetic Professional (EMPro) can now be used for swept simulation and optimization in the ADS Finite Element simulator (EMDS G2). Custom parameterized 3D components can be created in EMPro’s solid modeling environment and then placed in ADS layout. EMDS G2 can then simulate the 3D component together with the surrounding layout and even co-simulate with ADS circuit simulators. This powerful combination will detect chip/module/package/board interface issues much earlier in the design process. Learn more about EMPro. Complete Flow to Manufacturing * Enhanced and customized GaAs foundry qualified, approved and supported Process Design Kits (PDKs) that include Calibre & Assura DRC support and new MMIC toolbars * MMIC toolbars enable the full set of layout editing commands customized for foundry-specific PDKs, including single-button commands to: convert traces to transmission-line elements; edit transmission-line elements (stretch, tap, split, move to layer); automatically insert vias; automatically create multi-layer metal traces; synchronize layout back to the schematic; check design differences between layout and schematic; show nodal and physical connectivity; and launch the 3D layout viewer and DRC engine * Multi-technology PDK support provides easier management of interconnect layers and automation of MMIC/Module assembly for 3D EM simulation * iLVS, a new, interactive, desktop design checker that requires no setup and catches errors early in the design cycle * Calibre LVS integration supplements existing support for Calibre & Assura DRC Learn more about Agilent EEsof EDA Foundry Partners and Industry Resources. New Optimization Cockpit The optimization cockpit is a new interactive environment (cockpit) that enables you to enter multiple optimization variables and goals and interactively tune and control the progress of the optimizer. This enables you to achieve the best performance while gaining design insights on the behavior of the optimized variables versus the goals. At a glance, you can identify which variables are constrained at the limits of their allowed ranges and adjust these limits to allow the optimizer to achieve better results. You can also observe the Pareto of which goals dominate the error function to provide guidance on setting the goal weightings. When Will ADS 2009 Update 1 Be Available? ADS 2009 Update 1 will be demonstrated at public events and tradeshows worldwide beginning with the MTT-S International Microwave Symposium (IMS) in Boston the week of June 9th. For more detail on IMS 2009, refer to the IMS 2009: Technical Program and Workshops. Software for customer evaluation will be available after the ADS 2009 Update 1 Early Access/Beta program which will begin in June of 2009. Product shipments are expected by the end of the summer.
	来自： 222.190.117.* 字节：267 ID：15715 发贴时间：2009-12-22 13:18:31 原贴
	Ansoft与Ansys的产品整合终于进入尾声，Ansoft成为Ansys的EDA分部，Ansoft的产品基本上还是独立开发，发布也步入正轨，目前在HFSS11.2，Maxwell12.2上提供与Ansys 12的接口，与Ansys产品有重叠的是ePhysics，不知道是否会整合。另外，Ansoft网站终于在上月恢复更新，并以全新的面貌出现。
	来自： 222.190.117.* 字节：913 ID：15716 发贴时间：2009-12-22 13:18:48 原贴
	New in SIwave v4.0 Enhanced graphical user interface that allows simultaneous analyses and dynamic zooming Smart coupling algorithms with an advanced via solver combined with non-uniform (hexagonal and trapezoidal) trace cross-sections that provide accurate solutions beyond 10 Gb/s New co-planar algorithm within the solver extends accuracy for difficult package designs Ability to calculate trace characteristics on the fly Enhanced near- and far-field solvers for electromagnetic interference and compatibility problems Automated error checking and geometry correction Automated schematic creation, transient and QuickEye? analyses setup for circuit simulation driven by electromagnetics when using SIwave with Ansoft Designer. Auto- port creation for Apache RedHawk chip power modules Ability to link SIwave and ANSYS? Icepak? software to characterize heating due to copper-resistive losses
	来自： 222.190.117.* 字节：980 ID：15717 发贴时间：2009-12-22 13:19:04 原贴
	About HFSS 12 Meshing: - TAU mesher - 64-bit meshing - Curvilinear mesh elements Solve: - Domain decomposition - Analytical derivatives - Mixed-order solutions - Matched terminal port solutions - Extended precision for port solutions Remote Simulation: - New remote simulation manager Excitation Setup: - Enhanced analytical polarization of modes - Mode filtering for report setup Desktop: - Project preview - Integrated crash reporting - Hotkey customization Modeler: - ACIS 19 SP2 - Select by area - Flexible history editing - Defineable width for polyline cross-section - Moveable sheet edges - View model sections - Wrap sheet around a solid - 2D fillets and chamfers - Imprint sheet on solid - Enhanced healing: stitch and merge faces Post-Processing: - Post processing variables - Expression cache for solve setup - Report display types: stacked plots, rectangular contour plots, enhanced data tables - Streamline field plots
	来自： 222.190.117.* 字节：3470 ID：15718 发贴时间：2009-12-22 13:19:43 原贴
	Ansoft Designer V5.0,Nexxim V5.0几个月后将发布，开始支持AMI模型，Agilent ADS也将支持AMI。 MAJOR ENHANCEMENTS Designer V5.0 and Nexxim V5.0 ------------------------------------------------ o IBIS AMI support o Fast transient and eye diagram plotting based on precomputed reports. Inner eye contours optionally plotted. o Nexxim engine enhancements - Improved noise floor for VerifEye - Multi-threading for device models and QuickEye/VerifEye step response generation - Separate rise/fall times for QuickEye/VerifEye - Uniform and periodic transmit jitter in eye sources - Engine can be paused during a transient simulation and results can be viewed - Faster transient simulations using specialized model topologies - Significant S-parameter handing enhancements o Support for encrypted Verilog (using Ansoft encryption) o Significantly faster Nexxim tuning and optimization o PlanarEM - Thick conductor Q factor enhancements - Via modeling improvements - Improved adaptive refinement algorithm - Post processing variables - Improved simulation data management for better performance o Common and differential mode plotting for Nexxim and PlanarEM o Filter design and synthesis tool. - Designs can be exported ready-to-simulate to Nexxim o New tab in model definitions that allows users to pre-configure symbol pin locations when auto generating symbols o Caching of state-space fit models NPort models for use across projects o Parametric snapshot available for HFSS transmission line models o New solver-on-demand configurations to set multiple solver-on-demand settings at the project level in one shot o Ports and source "configurations" for Nexxim projects that provide better source management capabilities o File open preview shows thumbnail view of designs, notes and whether solved or not o Hierarchy now supported in PlanarEM o Layout stackup editor shows a preview of the stackup o Schematic editor has a new design list facility that lists components, graphics, ports and nets. Allows easy selection and property editing. o New padstack editor - top and cross section preview with tool tips - in-place editing with true layers from current layout o ndExplorer enhancements - Cell filtering to access only particular matrix entries - Log x axis scaling - Support for differential and singled ended matrices - Gamma and port impedance piloting - Enhancements when working with multiple files at the same time o Support for arrays of text and parametric sweeps - Bit patterns, W-elements and S-elements - Methods to import arrays of text from .cvs & .txt files o Wizard to create swept S & W element models o HFSS Export - ability to draw the air box and dielectric extents on the user layer in Designer and use this information at export time - ability to define the air box side as a dynamic factor - added support for parametric line export - added ability to automatically export instantiated geometry and simulate when necessary - added a property on ports and pins to specify reference ground layer for HFSS export o Miscellaneous - Optional property callback triggered on variable changes - Various layout import enhancements - Expanded on-line help - Additional examples in on-line help - New Ansoft COM technology for easier DSO setup and better integration with third party schedulers
	来自： 222.190.117.* 字节：12208 ID：15719 发贴时间：2009-12-22 13:20:08 原贴
	Ansys HFSS 12.0正式发布，重大更新包括64bit网格剖分、TAU网格技术、域分解，更适合多核CPU系统： ANSYS Releases HFSS 12.0 Engineering Simulation Software Industry-Standard RF & Microwave Simulation Solution Delivers Significant New Domain Decomposition Technology for High-Performance Computing SOUTHPOINTE, Pa., Sep 17, 2009 (BUSINESS WIRE) -- ANSYS, Inc. (NASDAQ: ANSS), a global innovator of simulation software and technologies designed to optimize product development processes, today announced the release of HFSS(TM) 12.0 software, the industry-leading technology for 3-D full-wave electromagnetic field simulation. The product, part of the Ansoft suite, helps engineers design, simulate and validate the behavior of complex high-performance radio frequency (RF), microwave and millimeter-wave devices in next-generation wireless communication and defense systems. A key high-performance computing (HPC) enhancement, domain decomposition, allows engineers to simulate and design at a scale and speed never before possible. Users of this latest version of HFSS software can achieve a dramatic reduction in development time and costs while at the same time realizing increased reliability and design optimization. With the release of HFSS 12.0, ANSYS follows through on its commitment to deliver technology with unequalled depth and unparalleled breadth. HFSS 12.0 is a major step forward for three-dimensional full-wave electromagnetic field simulation. The software includes key updates in mesh generation, solver technologies, and enhancements to the user interface and the modeler. A new, faster and more robust meshing algorithm generates higher-quality, more efficient tetrahedral meshes. The most significant solver technology enhancement is domain decomposition, a technique that allows HFSS to exploit HPC capabilities to solve electromagnetic field problems of unprecedented size and scope. Other important enhancements include mixed element orders, curvilinear elements, and adjoint derivative computation. Ease of use and automation in the user interface have been improved and include additional modeler capabilities such as sheet wrapping and imprinting. These advances in HFSS 12.0 enable electrical engineers to expand their solution capability, exploit HPC hardware and fully integrate electromagnetics analysis into their Simulation Driven Product Development(TM) processes. "HFSS 12.0 is a breakthrough in high-frequency electromagnetic field simulation," said Zol Cendes, chief technology officer and general manager at Ansoft. "For the first time, engineers are able to solve vast electromagnetic field problems with speed, efficiency and accuracy. Because of domain decomposition, microwave and electronics engineers now have the opportunity to successfully address a new range of problems containing hundreds of millions of unknowns that previously could not be addressed by simulation. The ANSYS focus on developing simulation technology that takes full advantage of modern computer hardware solutions means that customers will have future capabilities that, today, we can only imagine." The new domain decomposition technology in HFSS 12.0 software allows efficient and highly scalable parallelized simulations across multiple computer cores including networked cores. In running a 15-GB benchmark on an HP 7880 workstation, domain decomposition using eight cores exhibited an 8.8-times speedup with a 33 percent memory savings compared to a single-core direct solve. Curvilinear elements and mixed element orders allow for higher accuracy and more efficient distribution of computational resources. Curvilinear elements model the fields exactly on curved surfaces and in these cases provide higher accuracy even with a coarser mesh discretization. Mixed element orders allows for an automated and judicious localized application of element order. Smaller features are solved more efficiently by lower-order elements while large homogenous regions benefit from higher-order elements, all element orders being automatically and appropriately "mixed" in one mesh. Molex Incorporated, a leading supplier of electronic connectors and interconnect products, was among the organizations that participated in beta testing the new release. The company investigated a number of features, including the new TAU volumetric meshing technique, whose robust tet mesh elements reduce the overall load on the solver. "The new TAU meshing and mixed element orders technology in HFSS 12.0 will allow Molex engineers to more accurately and efficiently simulate and design," said Dave Dunham, engineering director at Molex. "We have more than doubled productivity with the implementation of HFSS 12.0 in our design flow." Adjoint derivative computation provides a highly efficient and accurate procedure to evaluate the derivatives of S-parameters with respect to geometric and material model parameter variations. This technique provides sensitivity information for use in device tuning, tolerance evaluation and optimization. These derivatives are employed to speed up the sequential nonlinear programming (SNLP) optimizer included with the Optimetrics(TM) add-on program. New features in HFSS 12.0 software include: * New TAU meshing technology * Domain decomposition solver technology * Curvilinear elements * Mixed element orders * Adjoint derivative computation * Update to ACIS R19.2 * Improved link with ANSYS(R) DesignXplorer(TM) software HFSS(tm) v12.0 ================================== Ansoft, LLC 225 West Station Square Dr, Suite 200 Pittsburgh, PA 15219-1119 USA This file contains important information regarding the installation and use of HFSS(tm). When appropriate, late-breaking information is provided herein that could not be included in the software documentation. 32-bit System Requirements ========================== Minimum System Requirements: Processor: All fully compatible 686 (or later) instruction set processors, 500 MHz Hard Drive Space (for HFSS software): 200 MB RAM: 512 MB Recommended Minimum Configuration (for Optimal Performance): Processor: All fully compatible 786 (or later) instruction set processors, 2 GHz Hard Drive Space (for HFSS software and temporary files): 700 MB RAM: 4 GB 64-bit System Requirements ========================== Minimum System Requirements: Supported processors: AMD Athlon 64, AMD Opteron, Intel Xeon with Intel EM64T support, Intel Pentium 4 with Intel EM64T support Hard Drive Space (for HFSS software): 200 MB RAM: 2 GB Recommended Minimum Configuration (for Optimal Performance): Supported processors: AMD Athlon 64, AMD Opteron, Intel Xeon with Intel EM64T support, Intel Pentium 4 with Intel EM64T support Video card: 128-bit SVGA or PCI Express video card Hard Drive Space (for HFSS software and temporary files): 700 MB RAM: 8 GB Supported Operating Systems: - Windows XP 32-bit Service Pack 2 - Windows Server 2003 32-bit Service Pack 1 - Windows Vista 32-bit Service Pack 1 - Windows XP 64-bit Service Pack 2 - Windows Server 2003 64-bit Service Pack 1 - Windows HPC Server 2008 - Windows Vista 64-bit Service Pack 1 Installation ============ This CD contains the following installation options: - Install HFSS: Use this option to install HFSS(tm) on your local machine. - Install Libraries: Use this option to install the libraries on any machine that HFSS can see from the network. Installing the libraries on a remote machine allows multiple users to share a common HFSS libraries database. Note: If you want to install the HFSS libraries on your local machine, you can do so during the HFSS software installation. - Install Remote Simulation Manager: Use this option to install Remote Simulation Manager on your local machine. Temp Directory Prompt --------------------- There is a new dialog in the HFSS installation that prompts you for a temporary directory to be used by default for all users. You can override the setting for a specific user by using the Tools > Options > General Options menu and selecting the Override checkbox associated with the Temp Directory setting. If you wish to edit the default setting, for now you must modify the installation. Installation Maintenance ------------------------ If you need to modify the RSM settings after the installation is complete, you can run the installation in maintenance mode by choosing Start > Programs > Ansoft > Remote Simulation Manager > Remote Simulation Manager Maintenance. Technical and Installation Support ================================== For installation or technical support, please send e-mail to techsupport@ansoft.com or call (+1) 412-261-3200 x199. Please provide the following information when you contact us: - Your name and affiliation - Version number of HFSS - The type of hardware and operating system you are using - A description of what happened and what you were doing when the problem occurred as well as the exact wording of any messages that appeared on the screen HFSS project files (.hfss) are ASCII text and can be sent by e-mail. Known Problems, Workarounds, and Undocumented Features ====================================================== General ------- 1) ANSft00089261: It is possible to encounter a desktop crash when a user selects the 'Families' tab in a report setup. This is only a problem on Windows, and it can occur when mfc80.dll has been upgraded to a newer version. Microsoft has made a hotfix available at the following website, http://support.microsoft.com/kb/961894. HFSS-specific issues -------------------- 1) Mixed Order - The fields post-processor only supports a single order, and fields are written out at the highest order used in the solution. 2) Matched terminals - Users must obtain a build of Ansoft Designer 4.1.1 in order to link with a driven terminal design in HFSS 12.0. 3) Analytical derivatives Driven Modal Projects: - Parameterized ports with degenerate modes - Parameterized analytical ports - Parameterized master/slave boundary conditions 4) Remote Simulation Manager - RSM should not be installed to a mapped network drive. 5) Datalink - The link to Ansoft Designer will not support post-processing variables for the HFSS 12.0 release. ANSft00090009: HFSS/HFSS near-field datalink simulations will fail when the source design contains two symmetry planes. Version 12.0 Major Enhancements =============================== Meshing: - TAU mesher - 64-bit meshing - Curvilinear mesh elements Solve: - Domain decomposition - Analytical derivatives - Mixed-order solutions - Matched terminal port solutions - Extended precision for port solutions - Two-way thermal analysis link with ANSYS Mechanical * Remote Simulation and Distributed Solve: - New remote simulation manager (RSM) - Supports LSF and Windows HPC Optimetrics: - Integration with ANSYS DesignXplorer * Excitation Setup: - Enhanced analytical polarization of modes - Mode filtering for report setup Desktop: - Project preview - Integrated crash reporting - Hotkey customization Modeler: - ACIS 19 SP2 - Select by area - Flexible history editing - Defineable width for polyline cross-section - Moveable sheet edges - View model sections - Wrap sheet around a solid - 2D fillets and chamfers - Imprint sheet on solid - Enhanced healing: stitch and merge faces Post-Processing: - Post processing variables - Expression cache for solve setup - Report display types: stacked plots, rectangular contour plots, enhanced data tables - Streamline field plots * Available upon release of ANSYS 12.1
	来自： 222.190.117.* 字节：6325 ID：15720 发贴时间：2009-12-22 13:20:38 原贴
	Ansoft Designer and Nexxim 5.0正式版本发布，Designer和Nexxim又合在一起，与SI相关的更新主要是高速串行通道仿真相关。 RELEASE NOTES ------------- MAJOR ENHANCEMENTS Designer V5.0 and Nexxim V5.0 ------------------------------------------------ o IBIS AMI support o Fast transient and eye diagram plotting based on precomputed reports. Inner eye contours optionally plotted. o Nexxim engine enhancements - Improved noise floor for VerifEye - Multi-threading for device models and QuickEye/VerifEye step response generation - Separate rise/fall times for QuickEye/VerifEye - Uniform and periodic transmit jitter in eye sources - Engine can be paused during a transient simulation and results can be viewed - Faster transient simulations using specialized model topologies - Significant S-parameter handing enhancements o Support for encrypted Verilog (using Ansoft encryption) o Significantly faster Nexxim tuning and optimization o PlanarEM - Thick conductor Q factor enhancements - Via modeling improvements - Improved adaptive refinement algorithm - Post processing variables - Improved simulation data management for better performance o Common and differential mode plotting for Nexxim and PlanarEM o Filter design and synthesis tool. - Designs can be exported ready-to-simulate to Nexxim o New tab in model definitions that allows users to pre-configure symbol pin locations when auto generating symbols o Caching of state-space fit models NPort models for use across projects o Parametric snapshot available for HFSS transmission line models o New solver-on-demand configurations to set multiple solver-on-demand settings at the project level in one shot o Ports and source "configurations" for Nexxim projects that provide better source management capabilities o File open preview shows thumbnail view of designs, notes and whether solved or not o Hierarchy now supported in PlanarEM o Layout stackup editor shows a preview of the stackup o Schematic editor has a new design list facility that lists components, graphics, ports and nets. Allows easy selection and property editing. o New padstack editor - top and cross section preview with tool tips - in-place editing with true layers from current layout o ndExplorer enhancements - Cell filtering to access only particular matrix entries - Log x axis scaling - Support for differential and singled ended matrices - Gamma and port impedance piloting - Enhancements when working with multiple files at the same time o Support for arrays of text and parametric sweeps - Bit patterns, W-elements and S-elements - Methods to import arrays of text from .cvs & .txt files o Wizard to create swept S & W element models o HFSS Export - ability to draw the air box and dielectric extents on the user layer in Designer and use this information at export time - ability to define the air box side as a dynamic factor - added support for parametric line export - added ability to automatically export instantiated geometry and simulate when necessary - added a property on ports and pins to specify reference ground layer for HFSS export o Miscellaneous - Optional property callback triggered on variable changes - Various layout import enhancements - Expanded on-line help - Additional examples in on-line help - New Ansoft COM technology for easier DSO setup and better integration with third party schedulers Nexxim Model additions: (only new models listed) ------------------------------------------------ o Coplanar Waveguide models - Rectangular Inductor - Lange_physical - Lange_electrical o Grounded Coplanar - Via Hole - Rectangular Inductor - Lange_physical - Lange_electrical o Microstrip - MIM capacitor C and Q specified - MIM capacitor C and loss specified - MIM circular capacitor Q specified - MIM circular capacitor, Loss Specified - MIM Rectangular Capcitor, Q specified - MIM Rectangular Capacitor, Loss Specified - Dielectric Resonator, Band Pass - Dielectric Resonator, Band stop - Coupled lines open - Open end effect - Multi-coupled lines asymmetric - Lange coupler - electrical length - Lange coupler - physical length - Thin film resistor - bulk resistivity - Thin film resistor - surface resistivity o Suspended Stripline - Cross Junction - Tee - Step - Bends - Bend, mitered - Bend, unmitered - Open Ended Lines - Open Stub, physical length - Open Stub, physical length with ref. node - Open Stub, electrical length - Open Stub, electrical length with ref. node - Short ended lines - Shorted Stub, physical length - Shorted Stub, electrical length - Shorted Stub, electrical length with ref. - Shorted Stub, physical length with ref. - Multi-coupled lines asymmetric o Stripline - Multi-coupled lines asymmetric - Open end effect - Coupled lines with open ends o Offset Stripline - Multi-coupled lines asymmetric o Ideal microwave - Antenna, Parabolic o Independent sources - i_whitenoise - v_shotnoise - v_whitenoise - i_shotnoise o Ideal distributed - Thin film resistor - bulk resistivity - Thin film resistor - surface resistivity o Rectangular waveguide - TE10 Mode - Termination o Optoelectronic - PIN photodetector o Filters - Pole zero band pass - causal - Pole zero band reject - causal - Pole zero high pass - causal - Pole zero low pass - causal - Polynomial band pass - causal - Polynomial band reject - causal - Polynomial high pass - causal - Polynomial low pass - causal o Nexsys (Nexxim system simulation) - Uniform random noise source - Real signal shift - Complex signal shift - Signum function - Exponential to the base Y o Additional models - Chip Capacitor DF factor - Chip capacitor Q factor - Chip Capacitor ESR - Chip Inductor DF factor - Chip Inductor Q factor - Chip Inductor ESR - Chip Resistor - Crystal Q Parallel Resonance - Crystal Q Series Resonance - Toroidal Inductor, Physical model - Toroidal Inductor, n Taps Physical model - Toroidal Inductor - Toroidal inductor, n Taps
	来自： 222.190.117.* 字节：262 ID：15721 发贴时间：2009-12-22 13:21:00 原贴
	HFSS(tm) v12.1 Beta版发布，增加了一个求解器：Integral Equation field solver Version 12.1 Major Enhancements =============================== - HFSS-IE: Integral Equation field solver - Integral equation formulation for radiation boundaries in HFSS designs
	来自： 222.190.117.* 字节：2811 ID：15722 发贴时间：2009-12-22 13:21:21 原贴
	Xilinx 与 Sisoft的合作终于开花结果，Xilinx今日公开了Virtex-5 GTP、GTX的ibis-ami模型，同时发布的还有专门针对Sisoft QCD的Design Kit，需要申请才能下载，在QCD 2009.8及以上版本中使用。 http://www.xilinx.com/support/download/virtex5ibisami.htm 同时，Sisoft近期将会举办针对Xilinx AMI模型的Webinar： http://www.sisoft.com/news_events_xilinx_webinar.asp Serial Link Analysis Webinar The Future is Now: Multi-Gigabit Design with Xilinx IBIS-AMI Models Thursday, November 12, 2009 10AM Pacific / 11AM Mountain / Noon Central / 1 PM Eastern Register Now Next generation communications, networking, and consumer electronics products are replacing high-speed parallel interfaces with multi-gigabit serial links as the primary means of moving data within a system. Conventional signal integrity and timing analysis won’t work for these links, which require analyzing millions of bits worth of behavior to reliably determine how jitter, noise and crosstalk affect link operating margins. The IBIS-AMI modeling specification enables standardized, interoperable simulation of SerDes PHYs at the high levels of simulation performance and accuracy needed to correctly predict the behavior of serial links. This webinar highlights how IBIS-AMI based simulation will enable you to increase design reliability while reducing engineering design time. Using SiSoft’s Quantum Channel Designer software and IBIS-AMI models, systems designers can experiment with different combinations of channel lengths, connectors, via designs and Transmit / Receive equalization to quickly determine which configurations provide adequate operating margin and which don't. Pre- and post-layout simulation with Quantum Channel Designer allows designers to validate designs and reduce time to market while increasing confidence in their design's reliability and manufacturability. This complimentary webinar will focus on the following topics: * Xilinx IBIS-AMI simulation models for Virtex®-5, Virtex®-6 and Spartan®-6 * Predicting serial link operating margins using simulation * Co-optimizing your channel design and SerDes configuration * Assessing the impact of jitter, noise & crosstalk * Xilinx IBIS-AMI Design Kits for SiSoft’s Quantum Channel Designer Register Now About the Presenters Anthony Torza is a Sr. Technical Marketing Manager for Xilinx specializing in Serial Transceivers. Previously he was a System Architect and Hardware design engineer for various telecom equipment companies including CIENA and Tellabs. He holds an MSEE from Stanford. Todd Westerhoff, vice president of software products for SiSoft, has over 30 years experience in the modeling and analysis of electronic systems, including 13 years of signal integrity experience.
	来自： 116.25.147.* 字节：190 ID：15805 发贴时间：2010-01-06 23:29:04 原贴
	十分佩服，兄台对SI领域掌故如此了解，对SI界各位大佬动向如此了解，得经常来逛逛了。工作关系知道如今altera的si高手如云，不知道xilinx里面有哪些强人，兄台可否对这两个公司的si强人也做个介绍，谢过！

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